Andrew D. Strachan

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Transistors with oxide liner in drift region
- Patent number 11,552,183
- Issue date Jan 10, 2023
- Texas Instruments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Drain extended transistor
- Patent number 11,152,505
- Issue date Oct 19, 2021
- Texas Instruments Incorporated
- Alexei Sadovnikov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertically-constructed, temperature-sensing resistors and methods o...
- Patent number 10,937,574
- Issue date Mar 2, 2021
- Texas Instruments Incorporated
- Gregory Keith Cestra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic biasing to mitigate electrical stress in integrated resistors
- Patent number 10,748,818
- Issue date Aug 18, 2020
- Texas Instruments Incorporated
- Tathagata Chatterjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with oxide liner in drift region
- Patent number 10,714,594
- Issue date Jul 14, 2020
- Texas Instruments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertically-constructed, temperature-sensing resistors and methods o...
- Patent number 10,431,357
- Issue date Oct 1, 2019
- Texas Instruments Incorporated
- Gregory Keith Cestra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low dynamic resistance low capacitance diodes
- Patent number 10,153,269
- Issue date Dec 11, 2018
- Texas Instruments Incorporated
- Andrew D Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split-gate lateral extended drain MOS transistor structure and process
- Patent number 9,905,428
- Issue date Feb 27, 2018
- Texas Instruments Incorporated
- Andrew D Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact array optimization for ESD devices
- Patent number 9,865,584
- Issue date Jan 9, 2018
- Texas Instruments Incorporated
- He Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a biCMOS semiconductor chip that increases the be...
- Patent number 9,831,135
- Issue date Nov 28, 2017
- Texas Instruments Incorporated
- Natalia Lavrovskaya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low dynamic resistance low capacitance diodes
- Patent number 9,773,777
- Issue date Sep 26, 2017
- Texas Instruments Incorporated
- Andrew D Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a BICMOS semiconductor chip that increases the be...
- Patent number 9,595,480
- Issue date Mar 14, 2017
- Texas Instruments Incorporated
- Natalia Lavrovskaya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Schottky diode integrated into LDMOS
- Patent number 8,686,502
- Issue date Apr 1, 2014
- Texas Instruments Incorporated
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a robust, modular MIS (metal-insulator-semiconduc...
- Patent number 8,664,076
- Issue date Mar 4, 2014
- Texas Instruments Incorporated
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data retention in a single poly EPROM cell
- Patent number 8,541,863
- Issue date Sep 24, 2013
- National Semiconductor Corporation
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for integrating MIM capacitor and thin film resistor in modu...
- Patent number 8,445,353
- Issue date May 21, 2013
- National Semiconductor Corporation
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing and manufacturing a PMOS device with drain jun...
- Patent number 8,086,979
- Issue date Dec 27, 2011
- National Semiconductor Corp.
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for providing a poly cap and a no field oxide are...
- Patent number 7,989,883
- Issue date Aug 2, 2011
- National Semiconductor Corporation
- Charles A. Dark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical test structure and method for characterization of deep t...
- Patent number 7,960,998
- Issue date Jun 14, 2011
- National Semiconductor Corporation
- Lisa V. Rozario
- G01 - MEASURING TESTING
Information Patent Grant
System and method for increasing breakdown voltage of LOCOS isolate...
- Patent number 7,867,871
- Issue date Jan 11, 2011
- National Semiconductor Corporation
- Richard W. Foote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of controlling the breakdown voltage of BSCRs and BJT clamps
- Patent number 7,714,355
- Issue date May 11, 2010
- National Semiconductor Corp.
- Vladislav Vashchenko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing and manufacturing a PMOS device with drain jun...
- Patent number 7,560,348
- Issue date Jul 14, 2009
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a MIM capacitor
- Patent number 7,510,944
- Issue date Mar 31, 2009
- National Semiconductor Corporation
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a silicide bridged anti-fuse with a tungsten plug...
- Patent number 7,507,607
- Issue date Mar 24, 2009
- National Semiconductor Corporation
- Charles A. Dark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for providing a poly cap and a no field oxide are...
- Patent number 7,488,647
- Issue date Feb 10, 2009
- National Semiconductor Corporation
- Charles A. Dark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a circuit having subsurface conductors
- Patent number 7,479,435
- Issue date Jan 20, 2009
- National Semiconductor Corporation
- Peter J. Hopper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM structure with improved data retention utilizing biased meta...
- Patent number 7,425,741
- Issue date Sep 16, 2008
- National Semiconductor Corporation
- Andrew Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of measuring the leakage current of a deep trench isolation...
- Patent number 7,298,159
- Issue date Nov 20, 2007
- National Semiconductor Corporation
- Lisa V. Rozario
- G01 - MEASURING TESTING
Information Patent Grant
Method of forming a high-voltage silicon controlled rectifier struc...
- Patent number 7,238,553
- Issue date Jul 3, 2007
- National Semiconductor Corporation
- Vladislav Vashchenko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-source, multi-gate MOS transistor with a drain region that is...
- Patent number 7,214,992
- Issue date May 8, 2007
- National Semiconductor Corporation
- Andy Strachan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TRANSISTORS WITH OXIDE LINER IN DRIFT REGION
- Publication number 20200303518
- Publication date Sep 24, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Henry Litzmann EDWARDS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC BIASING TO MITIGATE ELECTRICAL STRESS IN INTEGRATED RESISTORS
- Publication number 20200203230
- Publication date Jun 25, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Tathagata Chatterjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY-CONSTRUCTED, TEMPERATURE-SENSING RESISTORS AND METHODS O...
- Publication number 20200013528
- Publication date Jan 9, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Gregory Keith Cestra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAIN EXTENDED TRANSISTOR
- Publication number 20200006549
- Publication date Jan 2, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Alexei Sadovnikov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY-CONSTRUCTED, TEMPERATURE-SENSING RESISTORS AND METHODS O...
- Publication number 20190148041
- Publication date May 16, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Gregory Keith Cestra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH OXIDE LINER IN DRIFT REGION
- Publication number 20190148517
- Publication date May 16, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Henry Litzmann EDWARDS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT ARRAY OPTIMIZATION FOR ESD DEVICES
- Publication number 20180006013
- Publication date Jan 4, 2018
- TEXAS INSTRUMENTS INCORPORATED
- He LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW DYNAMIC RESISTANCE LOW CAPACITANCE DIODES
- Publication number 20170345813
- Publication date Nov 30, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Andrew D. Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW DYNAMIC RESISTANCE LOW CAPACITANCE DIODES
- Publication number 20170200712
- Publication date Jul 13, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Andrew D. Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A BICMOS SEMICONDUCTOR CHIP THAT INCREASES THE BE...
- Publication number 20170140991
- Publication date May 18, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Natalia Lavrovskaya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT-GATE LATERAL EXTENDED DRAIN MOS TRANSISTOR STRUCTURE AND PROCESS
- Publication number 20170125252
- Publication date May 4, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Andrew D. Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A BICMOS SEMICONDUCTOR CHIP THAT INCREASES THE BE...
- Publication number 20160163598
- Publication date Jun 9, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Natalia Lavrovskaya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SCHOTTKY DIODE INTEGRATED INTO LDMOS
- Publication number 20130341705
- Publication date Dec 26, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Schottky diode integrated into LDMOS
- Publication number 20130240980
- Publication date Sep 19, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A ROBUST, MODULAR MIM CAPACITOR WITH IMPROVED CAP...
- Publication number 20130069200
- Publication date Mar 21, 2013
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DATA RETENTION IN A SINGLE POLY EPROM CELL
- Publication number 20120132975
- Publication date May 31, 2012
- Venkat Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD FOR INCREASING BREAKDOWN VOLTAGE OF LOCOS ISOLATE...
- Publication number 20110065256
- Publication date Mar 17, 2011
- National Semiconductor Corporation
- Richard W. Foote, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Designing and Manufacturing a PMOS Device with Drain Jun...
- Publication number 20090254872
- Publication date Oct 8, 2009
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL TEST STRUCTURE AND METHOD FOR CHARACTERIZATION OF DEEP T...
- Publication number 20090206865
- Publication date Aug 20, 2009
- Lisa V. Rozario
- G01 - MEASURING TESTING
Information Patent Application
Method for designing and manufacturing a PMOS device with drain jun...
- Publication number 20070264768
- Publication date Nov 15, 2007
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS

Andrew D. Strachan

Person

Patents Grantslast 30 patents

Transistors with oxide liner in drift region

Drain extended transistor

Vertically-constructed, temperature-sensing resistors and methods o...

Dynamic biasing to mitigate electrical stress in integrated resistors

Transistors with oxide liner in drift region

Vertically-constructed, temperature-sensing resistors and methods o...

Low dynamic resistance low capacitance diodes

Split-gate lateral extended drain MOS transistor structure and process

Contact array optimization for ESD devices

Method of forming a biCMOS semiconductor chip that increases the be...

Low dynamic resistance low capacitance diodes

Method of forming a BICMOS semiconductor chip that increases the be...

Schottky diode integrated into LDMOS

Method of forming a robust, modular MIS (metal-insulator-semiconduc...

Data retention in a single poly EPROM cell

Method for integrating MIM capacitor and thin film resistor in modu...

Method for designing and manufacturing a PMOS device with drain jun...

System and method for providing a poly cap and a no field oxide are...

Electrical test structure and method for characterization of deep t...

System and method for increasing breakdown voltage of LOCOS isolate...

Method of controlling the breakdown voltage of BSCRs and BJT clamps

Method for designing and manufacturing a PMOS device with drain jun...

Method of forming a MIM capacitor

Method of forming a silicide bridged anti-fuse with a tungsten plug...

System and method for providing a poly cap and a no field oxide are...

Method of forming a circuit having subsurface conductors

EEPROM structure with improved data retention utilizing biased meta...

Method of measuring the leakage current of a deep trench isolation...

Method of forming a high-voltage silicon controlled rectifier struc...

Multi-source, multi-gate MOS transistor with a drain region that is...

Patents Applicationslast 30 patents

TRANSISTORS WITH OXIDE LINER IN DRIFT REGION

DYNAMIC BIASING TO MITIGATE ELECTRICAL STRESS IN INTEGRATED RESISTORS

VERTICALLY-CONSTRUCTED, TEMPERATURE-SENSING RESISTORS AND METHODS O...

DRAIN EXTENDED TRANSISTOR

VERTICALLY-CONSTRUCTED, TEMPERATURE-SENSING RESISTORS AND METHODS O...

TRANSISTORS WITH OXIDE LINER IN DRIFT REGION

CONTACT ARRAY OPTIMIZATION FOR ESD DEVICES

LOW DYNAMIC RESISTANCE LOW CAPACITANCE DIODES

LOW DYNAMIC RESISTANCE LOW CAPACITANCE DIODES

METHOD OF FORMING A BICMOS SEMICONDUCTOR CHIP THAT INCREASES THE BE...

SPLIT-GATE LATERAL EXTENDED DRAIN MOS TRANSISTOR STRUCTURE AND PROCESS

METHOD OF FORMING A BICMOS SEMICONDUCTOR CHIP THAT INCREASES THE BE...

SCHOTTKY DIODE INTEGRATED INTO LDMOS

Schottky diode integrated into LDMOS

METHOD OF FORMING A ROBUST, MODULAR MIM CAPACITOR WITH IMPROVED CAP...

DATA RETENTION IN A SINGLE POLY EPROM CELL

SYSTEM AND METHOD FOR INCREASING BREAKDOWN VOLTAGE OF LOCOS ISOLATE...

Method for Designing and Manufacturing a PMOS Device with Drain Jun...

ELECTRICAL TEST STRUCTURE AND METHOD FOR CHARACTERIZATION OF DEEP T...

Method for designing and manufacturing a PMOS device with drain jun...