Brian John Connolly

Person

Williston, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for securing memory modules
- Patent number 11,687,468
- Issue date Jun 27, 2023
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant voltage regulator for memory devices
- Patent number 11,264,077
- Issue date Mar 1, 2022
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant voltage regulator for memory devices
- Patent number 10,937,485
- Issue date Mar 2, 2021
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual in-line memory module with dedicated read and write ports
- Patent number 10,678,714
- Issue date Jun 9, 2020
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant voltage regulator for memory devices
- Patent number 10,468,088
- Issue date Nov 5, 2019
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
System for securing contents of removable memory
- Patent number 10,067,886
- Issue date Sep 4, 2018
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
276-pin buffered memory card with enhanced memory system interconnect
- Patent number 10,007,306
- Issue date Jun 26, 2018
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
System for securing contents of removable memory
- Patent number 9,858,208
- Issue date Jan 2, 2018
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
276-pin buffered memory card with enhanced memory system interconnect
- Patent number 9,760,131
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
276-pin buffered memory card with enhanced memory system interconnect
- Patent number 9,519,315
- Issue date Dec 13, 2016
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
276-pin buffered memory card with enhanced memory system interconnect
- Patent number 9,501,107
- Issue date Nov 22, 2016
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
276-pin buffered memory card with enhanced memory system interconnect
- Patent number 9,357,649
- Issue date May 31, 2016
- Inernational Business Machines Corporation
- Sungjun Chun
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Implementing SDRAM having no RAS to CAS delay in write operation
- Patent number 8,797,823
- Issue date Aug 5, 2014
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for improving equalization in a high speed serdes...
- Patent number 8,396,106
- Issue date Mar 12, 2013
- International Business Machines Corporation
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for monitoring channel eye characteristics in a high-speed S...
- Patent number 7,869,379
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for monitoring BER in an infiniband environment
- Patent number 7,715,323
- Issue date May 11, 2010
- International Business Machines Corporation
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for transmitting data in an integrated circuit
- Patent number 7,571,377
- Issue date Aug 4, 2009
- International Business Machines Corporation
- Brian John Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multilevel parallel CRC generation and checking circuit
- Patent number 7,225,387
- Issue date May 29, 2007
- International Business Machines Corporation
- Ming-i M. Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Captured synchronous DRAM fails in a working environment
- Patent number 6,467,053
- Issue date Oct 15, 2002
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Grant
High density memory module with in-line bus switches being enabled...
- Patent number 6,070,217
- Issue date May 30, 2000
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple independent I/O functions on a PCMCIA card share a single...
- Patent number 5,805,929
- Issue date Sep 8, 1998
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High density memory modules with improved data bus performance
- Patent number 5,802,395
- Issue date Sep 1, 1998
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for converting system signals from one address configurat...
- Patent number 5,745,914
- Issue date Apr 28, 1998
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR SECURING MEMORY MODULES
- Publication number 20220004506
- Publication date Jan 6, 2022
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANT VOLTAGE REGULATOR FOR MEMORY DEVICES
- Publication number 20210134346
- Publication date May 6, 2021
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANT VOLTAGE REGULATOR FOR MEMORY DEVICES
- Publication number 20200013449
- Publication date Jan 9, 2020
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANT VOLTAGE REGULATOR FOR MEMORY DEVICES
- Publication number 20190189182
- Publication date Jun 20, 2019
- International Business Machines Corporation
- Brian J. Connolly
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL IN-LINE MEMORY MODULE WITH DEDICATED READ AND WRITE PORTS
- Publication number 20190155759
- Publication date May 23, 2019
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR SECURING CONTENTS OF REMOVABLE MEMORY
- Publication number 20180067874
- Publication date Mar 8, 2018
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT
- Publication number 20170364126
- Publication date Dec 21, 2017
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT
- Publication number 20170017274
- Publication date Jan 19, 2017
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT
- Publication number 20160216745
- Publication date Jul 28, 2016
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR SECURING CONTENTS OF REMOVABLE MEMORY
- Publication number 20140289488
- Publication date Sep 25, 2014
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT
- Publication number 20140268973
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING SDRAM HAVING NO RAS TO CAS DELAY IN WRITE OPERATION
- Publication number 20140112063
- Publication date Apr 24, 2014
- International Business Machines Corporation
- Brian J. Connolly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT
- Publication number 20130301207
- Publication date Nov 14, 2013
- International Business Machines Corporation
- Sungjun Chun
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SYSTEM AND METHOD FOR IMPROVING EQUALIZATION IN A HIGH SPEED SERDES...
- Publication number 20090257514
- Publication date Oct 15, 2009
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR IMPROVING EQUALIZATION IN A HIGH SPEED SERDES...
- Publication number 20090245110
- Publication date Oct 1, 2009
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD FOR MONITORING CHANNEL EYE CHARACTERISTICS IN A HIGH-SPEED S...
- Publication number 20080285443
- Publication date Nov 20, 2008
- International Business Machines Corporation
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD FOR MONITORING BER IN AN INFINIBAND ENVIRONMENT
- Publication number 20080285453
- Publication date Nov 20, 2008
- International Business Machines Corporation
- Brian J. Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR TRANSMITTING DATA IN AN INTEGRATED CIRCUIT
- Publication number 20070147430
- Publication date Jun 28, 2007
- Brian John Connolly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multilevel parallel CRC generation and checking circuit
- Publication number 20050172205
- Publication date Aug 4, 2005
- International Business Machines Corporation
- Ming-i M. Lin
- H03 - BASIC ELECTRONIC CIRCUITRY

Brian John Connolly

Person

Patents Grantslast 30 patents

Method and apparatus for securing memory modules

Redundant voltage regulator for memory devices

Redundant voltage regulator for memory devices

Dual in-line memory module with dedicated read and write ports

Redundant voltage regulator for memory devices

System for securing contents of removable memory

276-pin buffered memory card with enhanced memory system interconnect

System for securing contents of removable memory

276-pin buffered memory card with enhanced memory system interconnect

276-pin buffered memory card with enhanced memory system interconnect

276-pin buffered memory card with enhanced memory system interconnect

276-pin buffered memory card with enhanced memory system interconnect

Implementing SDRAM having no RAS to CAS delay in write operation

System and method for improving equalization in a high speed serdes...

Method for monitoring channel eye characteristics in a high-speed S...

Method for monitoring BER in an infiniband environment

Method and apparatus for transmitting data in an integrated circuit

Multilevel parallel CRC generation and checking circuit

Captured synchronous DRAM fails in a working environment

High density memory module with in-line bus switches being enabled...

Multiple independent I/O functions on a PCMCIA card share a single...

High density memory modules with improved data bus performance

Technique for converting system signals from one address configurat...

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR SECURING MEMORY MODULES

REDUNDANT VOLTAGE REGULATOR FOR MEMORY DEVICES

REDUNDANT VOLTAGE REGULATOR FOR MEMORY DEVICES

REDUNDANT VOLTAGE REGULATOR FOR MEMORY DEVICES

DUAL IN-LINE MEMORY MODULE WITH DEDICATED READ AND WRITE PORTS

SYSTEM FOR SECURING CONTENTS OF REMOVABLE MEMORY

276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT

276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT

276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT

SYSTEM FOR SECURING CONTENTS OF REMOVABLE MEMORY

276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT

IMPLEMENTING SDRAM HAVING NO RAS TO CAS DELAY IN WRITE OPERATION

276-PIN BUFFERED MEMORY CARD WITH ENHANCED MEMORY SYSTEM INTERCONNECT

SYSTEM AND METHOD FOR IMPROVING EQUALIZATION IN A HIGH SPEED SERDES...

SYSTEM AND METHOD FOR IMPROVING EQUALIZATION IN A HIGH SPEED SERDES...

METHOD FOR MONITORING CHANNEL EYE CHARACTERISTICS IN A HIGH-SPEED S...

METHOD FOR MONITORING BER IN AN INFINIBAND ENVIRONMENT

METHOD AND APPARATUS FOR TRANSMITTING DATA IN AN INTEGRATED CIRCUIT

Multilevel parallel CRC generation and checking circuit