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Brian Reed
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San Jose, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Semiconductor chip including a chip level based on a layout that in...
Patent number
9,754,878
Issue date
Sep 5, 2017
Tela Innovations, Inc.
Stephen Kornachuk
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Methods for controlling microloading variation in semiconductor waf...
Patent number
9,122,832
Issue date
Sep 1, 2015
Tela Innovations, Inc.
Brian Reed
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Memory circuitry with write assist
Patent number
9,070,431
Issue date
Jun 30, 2015
ARM Limited
Frank Guo
G11 - INFORMATION STORAGE
Information
Patent Grant
Level shifting circuitry
Patent number
8,680,912
Issue date
Mar 25, 2014
ARM Limited
Brian William Reed
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Optimizing layout of irregular structures in regular layout context
Patent number
8,448,102
Issue date
May 21, 2013
Tela Innovations, Inc.
Stephen Kornachuk
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Grant
Methods for defining and utilizing sub-resolution features in linea...
Patent number
8,225,239
Issue date
Jul 17, 2012
Tela Innovations, Inc.
Brian Reed
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Grant
Feed-forward circuit for reducing delay through an input buffer
Patent number
7,005,910
Issue date
Feb 28, 2006
ARM Physical IP, Inc.
Scott T. Becker
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Voltage tolerant circuit for protecting an input buffer
Patent number
6,924,687
Issue date
Aug 2, 2005
Artisan Components, Inc.
Brian Reed
H03 - BASIC ELECTRONIC CIRCUITRY
Patents Applications
last 30 patents
Information
Patent Application
Optimizing Layout of Irregular Structures in Regular Layout Context
Publication number
20170365548
Publication date
Dec 21, 2017
Tela Innovations, Inc.
Stephen Kornachuk
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Methods for Controlling Microloading Variation in Semiconductor Waf...
Publication number
20150363542
Publication date
Dec 17, 2015
Tela Innovations, Inc.
Brian Reed
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MEMORY CIRCUITRY WITH WRITE ASSIST
Publication number
20150117119
Publication date
Apr 30, 2015
ARM Limited
Frank GUO
G11 - INFORMATION STORAGE
Information
Patent Application
LEVEL SHIFTING CIRCUITRY
Publication number
20140021999
Publication date
Jan 23, 2014
ARM Limited
Brian William REED
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Optimizing Layout of Irregular Structures in Regular Layout Context
Publication number
20130256898
Publication date
Oct 3, 2013
Tela Innovations, Inc.
Stephen Kornachuk
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Methods for Controlling Microloading Variation in Semiconductor Waf...
Publication number
20100031211
Publication date
Feb 4, 2010
Tela Innovations, Inc.
Brian Reed
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Methods for Defining and Utilizing Sub-Resolution Features in Linea...
Publication number
20090300574
Publication date
Dec 3, 2009
Brian Reed
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Optimizing Layout of Irregular Structures in Regular Layout Context
Publication number
20090300575
Publication date
Dec 3, 2009
Stephen Kornachuk
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Feed-forward circuit for reducing delay through an input buffer
Publication number
20050156642
Publication date
Jul 21, 2005
Artisan Components, Inc.
Scott T. Becker
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Voltage tolerant circuit for protecting an input buffer
Publication number
20050024101
Publication date
Feb 3, 2005
Artisan Components, Inc.
Brian Reed
H03 - BASIC ELECTRONIC CIRCUITRY