Bruno Vajana

Person

Bergamo, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Method for manufacturing electronic devices having non-volatile mem...
- Patent number 6,624,015
- Issue date Sep 23, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mask programmed ROM inviolable by reverse engineering inspections a...
- Patent number 6,614,080
- Issue date Sep 2, 2003
- STMicroelectronics S.r.l.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for obtaining a multi-level ROM in an EEPROM process flow
- Patent number 6,576,517
- Issue date Jun 10, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for manufacturing electronic devices having non-salicidated...
- Patent number 6,573,130
- Issue date Jun 3, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance contact structure for a select transistor of EEPROM...
- Patent number 6,548,857
- Issue date Apr 15, 2003
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing a semiconductor memory device comprising mass...
- Patent number 6,548,354
- Issue date Apr 15, 2003
- STMicroelectronics S.r.l.
- Roberta Bottini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anti-deciphering contacts
- Patent number 6,528,885
- Issue date Mar 4, 2003
- STMicroelectronics S.r.l.
- Bruno Vajana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for forming a multilevel ROM memory in a dual gate CMOS proc...
- Patent number 6,521,957
- Issue date Feb 18, 2003
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing electronic devices comprising high voltag...
- Patent number 6,501,147
- Issue date Dec 31, 2002
- STMicroelectronics S.r.l.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified DSCP process for manufacturing FLOTOX EEPROM non-autoali...
- Patent number 6,479,347
- Issue date Nov 12, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified process for defining the tunnel area in non-aligned, non...
- Patent number 6,444,526
- Issue date Sep 3, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for the manufacturing of an electrically programmable non-v...
- Patent number 6,437,395
- Issue date Aug 20, 2002
- STMicroelectronics S.r.l.
- Roberta Bottini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell for EEPROM devices, and corresponding fabricating process
- Patent number 6,432,762
- Issue date Aug 13, 2002
- SGS-Thomson Microelectronics
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having HV transistors a...
- Patent number 6,420,769
- Issue date Jul 16, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High efficiency memory device
- Patent number 6,414,349
- Issue date Jul 2, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices comprising non-volatile...
- Patent number 6,396,101
- Issue date May 28, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing memory cells with dimensional control of...
- Patent number 6,380,034
- Issue date Apr 30, 2002
- STMicroelectronics S.r.l.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing nonvolatile memory cells with dimensional...
- Patent number 6,350,652
- Issue date Feb 26, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having non-volatile mem...
- Patent number 6,351,008
- Issue date Feb 26, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing nonvolatile memory cells with dimensional...
- Patent number 6,340,828
- Issue date Jan 22, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell of the EEPROM type having its threshold adjusted by imp...
- Patent number 6,329,254
- Issue date Dec 11, 2001
- STMicroelectronics S.r.l.
- Carlo Cremonesi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell for EEPROM devices and corresponding fabricating process
- Patent number 6,320,219
- Issue date Nov 20, 2001
- SGS-Thomson Microelectronics, S.r.l.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile semiconductor memory device structure with superimposed...
- Patent number 6,307,229
- Issue date Oct 23, 2001
- STMicroelectronics, SRL
- Nicola Zatelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing an electronic device including MOS transi...
- Patent number 6,300,181
- Issue date Oct 9, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making high-voltage HV transistors with drain extension i...
- Patent number 6,284,607
- Issue date Sep 4, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices comprising non-volatile...
- Patent number 6,281,077
- Issue date Aug 28, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices, comprising non-salicid...
- Patent number 6,274,411
- Issue date Aug 14, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell of the EEPROM type having its threshold set by implanta...
- Patent number 6,268,247
- Issue date Jul 31, 2001
- STMicroelectronics S.r.l.
- Carlo Cremonesi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing electronic devices having HV transistors a...
- Patent number 6,251,728
- Issue date Jun 26, 2001
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM memory cell comprising a selection transistor with threshold...
- Patent number 6,221,717
- Issue date Apr 24, 2001
- STMicroelectronics S.r.l.
- Carlo Cremonesi
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Anti-deciphering contacts
- Publication number 20020079564
- Publication date Jun 27, 2002
- STMicroelectronics S.r.l.
- Bruno Vajana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mask programmed ROM inviolable by reverse engineering inspections a...
- Publication number 20020063268
- Publication date May 30, 2002
- STMicroelectronics S.r. I.
- Bruno Vajana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low resistance contact structure for a select transistor of EEPROM...
- Publication number 20020060349
- Publication date May 23, 2002
- STMicroelectronics S.r.l.
- Giovanna Dalla Libera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing electronic devices having non-volatile mem...
- Publication number 20020040993
- Publication date Apr 11, 2002
- STMicroelectronics S.r.l.
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory cell of the EEPROM type having its threshold adjusted by imp...
- Publication number 20020020872
- Publication date Feb 21, 2002
- STMicroelectronics S.r. I.
- Carlo Cremonesi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for producing a semiconductor memory device comprising mass...
- Publication number 20010025980
- Publication date Oct 4, 2001
- Roberta Bottini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing electronic devices having HV transistors a...
- Publication number 20010024861
- Publication date Sep 27, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated MOS transistor with a high threshold voltage and low mul...
- Publication number 20010022380
- Publication date Sep 20, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for the manufacturing of an electrically programmable non-v...
- Publication number 20010021555
- Publication date Sep 13, 2001
- Roberta Bottini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing electronic devices comprising non-volatile...
- Publication number 20010021556
- Publication date Sep 13, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE STRUCTURE WITH SUPERIMPOSED...
- Publication number 20010001492
- Publication date May 24, 2001
- NICOLA ZATELLI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a multilevel ROM memory in a dual gate CMOS proc...
- Publication number 20010001721
- Publication date May 24, 2001
- Matteo Patelmo
- H01 - BASIC ELECTRIC ELEMENTS

Bruno Vajana

Person

Patents Grantslast 30 patents

Method for manufacturing electronic devices having non-volatile mem...

Mask programmed ROM inviolable by reverse engineering inspections a...

Method for obtaining a multi-level ROM in an EEPROM process flow

Process for manufacturing electronic devices having non-salicidated...

Low resistance contact structure for a select transistor of EEPROM...

Process for producing a semiconductor memory device comprising mass...

Anti-deciphering contacts

Method for forming a multilevel ROM memory in a dual gate CMOS proc...

Process for manufacturing electronic devices comprising high voltag...

Simplified DSCP process for manufacturing FLOTOX EEPROM non-autoali...

Simplified process for defining the tunnel area in non-aligned, non...

Process for the manufacturing of an electrically programmable non-v...

Memory cell for EEPROM devices, and corresponding fabricating process

Method for manufacturing electronic devices having HV transistors a...

High efficiency memory device

Method for manufacturing electronic devices comprising non-volatile...

Process for manufacturing memory cells with dimensional control of...

Process for manufacturing nonvolatile memory cells with dimensional...

Method for manufacturing electronic devices having non-volatile mem...

Process for manufacturing nonvolatile memory cells with dimensional...

Memory cell of the EEPROM type having its threshold adjusted by imp...

Memory cell for EEPROM devices and corresponding fabricating process

Nonvolatile semiconductor memory device structure with superimposed...

Process for manufacturing an electronic device including MOS transi...

Method of making high-voltage HV transistors with drain extension i...

Method for manufacturing electronic devices comprising non-volatile...

Method for manufacturing electronic devices, comprising non-salicid...

Memory cell of the EEPROM type having its threshold set by implanta...

Method for manufacturing electronic devices having HV transistors a...

EEPROM memory cell comprising a selection transistor with threshold...

Patents Applicationslast 30 patents

Anti-deciphering contacts

Mask programmed ROM inviolable by reverse engineering inspections a...

Low resistance contact structure for a select transistor of EEPROM...

Method for manufacturing electronic devices having non-volatile mem...

Memory cell of the EEPROM type having its threshold adjusted by imp...

Process for producing a semiconductor memory device comprising mass...

Method for manufacturing electronic devices having HV transistors a...

Integrated MOS transistor with a high threshold voltage and low mul...

Process for the manufacturing of an electrically programmable non-v...

Method for manufacturing electronic devices comprising non-volatile...

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE STRUCTURE WITH SUPERIMPOSED...

Method for forming a multilevel ROM memory in a dual gate CMOS proc...