Burkhard D. Steinmacher-Burow

Person

Mount Kisco, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Heap/stack guard pages using a wakeup unit
- Patent number 8,713,294
- Issue date Apr 29, 2014
- International Business Machines Corporation
- Thomas M. Gooding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient implementation of multidimensional fast fourier transform...
- Patent number 8,095,585
- Issue date Jan 10, 2012
- International Business Machines Corporation
- Gyan V. Bhanot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low latency memory access and synchronization
- Patent number 7,818,514
- Issue date Oct 19, 2010
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global tree network for computing structures enabling global proces...
- Patent number 7,650,434
- Issue date Jan 19, 2010
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Class network routing
- Patent number 7,587,516
- Issue date Sep 8, 2009
- International Business Machines Corporation
- Gyan Bhanot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for prefetching non-contiguous data structures
- Patent number 7,529,895
- Issue date May 5, 2009
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multidimensional switch network
- Patent number 7,486,619
- Issue date Feb 3, 2009
- International Business Machines Corporation
- Dong Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
One-bounce network
- Patent number 7,457,303
- Issue date Nov 25, 2008
- International Business Machines Corporation
- Matthias A. Blumrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Global interrupt and barrier networks
- Patent number 7,444,385
- Issue date Oct 28, 2008
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Twin-tailed fail-over for fileservers maintaining full performance...
- Patent number 7,330,996
- Issue date Feb 12, 2008
- International Business Machines Corporation
- Paul W. Coteus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient implementation of a multidimensional fast fourier transfo...
- Patent number 7,315,877
- Issue date Jan 1, 2008
- International Business Machines Corporation
- Gyan V. Bhanot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic functions in torus and tree networks
- Patent number 7,313,582
- Issue date Dec 25, 2007
- International Business Machines Corporation
- Gyan Bhanot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized scalable network switch
- Patent number 7,305,487
- Issue date Dec 4, 2007
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency memory access and synchronization
- Patent number 7,174,434
- Issue date Feb 6, 2007
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deterministic error recovery protocol
- Patent number 7,149,920
- Issue date Dec 12, 2006
- International Business Machines Corporation
- Matthew A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Checkpointing filesystem
- Patent number 6,895,416
- Issue date May 17, 2005
- International Business Machines Corporation
- Alan G. Gara
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE AS POINT OF COHERENCE IN MULTIPROCESSOR SYSTEM
- Publication number 20110219188
- Publication date Sep 8, 2011
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEAP/STACK GUARD PAGES USING A WAKEUP UNIT
- Publication number 20110119445
- Publication date May 19, 2011
- International Business Machines Corporation
- Thomas M. Gooding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MEMORY ACCESS AND SYNCHRONIZATION
- Publication number 20080313408
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT IMPLEMENTATION OF MULTIDIMENSIONAL FAST FOURIER TRANSFORM...
- Publication number 20080133633
- Publication date Jun 5, 2008
- International Business Machines Corporation
- Gyan V. Bhanot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MEMORY ACCESS AND SYNCHRONIZATION
- Publication number 20070204112
- Publication date Aug 30, 2007
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multidimensional switch network
- Publication number 20050195808
- Publication date Sep 8, 2005
- International Business Machines Corporation
- Dong Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Deterministic error recovery protocol
- Publication number 20050081078
- Publication date Apr 14, 2005
- International Business Machines Corporation
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
One-bounce network
- Publication number 20050002387
- Publication date Jan 6, 2005
- International Business Machines Corporation
- Matthias A. Blumrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Class network routing
- Publication number 20040081155
- Publication date Apr 29, 2004
- Gyan V Bhanot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Efficient implementation of a multidimensional fast fourier transfo...
- Publication number 20040078405
- Publication date Apr 22, 2004
- Gyan V Bhanot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized scalable network switch
- Publication number 20040078482
- Publication date Apr 22, 2004
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Global tree network for computing structures
- Publication number 20040078493
- Publication date Apr 22, 2004
- Matthias A Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Twin-tailed fail-over for fileservers maintaining full performance...
- Publication number 20040073830
- Publication date Apr 15, 2004
- Paul W. Coteus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic functions in torus and tree networks
- Publication number 20040073590
- Publication date Apr 15, 2004
- Gyan Bhanot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low latency memoray system access
- Publication number 20040073758
- Publication date Apr 15, 2004
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Global interrupt and barrier networks
- Publication number 20040068599
- Publication date Apr 8, 2004
- Matthias A. Blumrich
- G06 - COMPUTING CALCULATING COUNTING

Burkhard D. Steinmacher-Burow

Person

Patents Grantslast 30 patents

Heap/stack guard pages using a wakeup unit

Efficient implementation of multidimensional fast fourier transform...

Low latency memory access and synchronization

Global tree network for computing structures enabling global proces...

Class network routing

Method for prefetching non-contiguous data structures

Multidimensional switch network

One-bounce network

Global interrupt and barrier networks

Twin-tailed fail-over for fileservers maintaining full performance...

Efficient implementation of a multidimensional fast fourier transfo...

Arithmetic functions in torus and tree networks

Optimized scalable network switch

Low latency memory access and synchronization

Deterministic error recovery protocol

Checkpointing filesystem

Patents Applicationslast 30 patents

CACHE AS POINT OF COHERENCE IN MULTIPROCESSOR SYSTEM

HEAP/STACK GUARD PAGES USING A WAKEUP UNIT

LOW LATENCY MEMORY ACCESS AND SYNCHRONIZATION

EFFICIENT IMPLEMENTATION OF MULTIDIMENSIONAL FAST FOURIER TRANSFORM...

LOW LATENCY MEMORY ACCESS AND SYNCHRONIZATION

Multidimensional switch network

Deterministic error recovery protocol

One-bounce network

Class network routing

Efficient implementation of a multidimensional fast fourier transfo...

Optimized scalable network switch

Global tree network for computing structures

Twin-tailed fail-over for fileservers maintaining full performance...

Arithmetic functions in torus and tree networks

Low latency memoray system access

Global interrupt and barrier networks