Carl R. Huster

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Asymmetric retrograde halo metal-oxide-semiconductor field-effect t...
- Patent number 6,667,512
- Issue date Dec 23, 2003
- Advanced Micro Devices, Inc.
- Carl R. Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective epitaxy to reduce gate/gate dielectric interface roughness
- Patent number 6,548,335
- Issue date Apr 15, 2003
- Advanced Micro Devices, Inc.
- Carl Robert Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making recessed source drains to reduce fringing capacitance
- Patent number 6,531,347
- Issue date Mar 11, 2003
- Advanced Micro Devices, Inc.
- Carl R. Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deposited screen oxide for reducing gate edge lifting
- Patent number 6,518,072
- Issue date Feb 11, 2003
- Advanced Micro Devices, Inc.
- Carl Robert Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of programming a non-volatile memory cell using a vertical e...
- Patent number 6,487,121
- Issue date Nov 26, 2002
- Advanced Micro Devices, Inc.
- Timothy J. Thurgate
- G11 - INFORMATION STORAGE
Information Patent Grant
Epitaxial delta doping for retrograde channel profile
- Patent number 6,426,279
- Issue date Jul 30, 2002
- Advanced Micro Devices, Inc.
- Carl Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optimized single side pocket implant location for a field effect tr...
- Patent number 6,396,103
- Issue date May 28, 2002
- Advanced Micro Devices, Inc.
- Concetta Riccobene
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOSFET with metal in gate for reduced gate resistance
- Patent number 6,395,606
- Issue date May 28, 2002
- Advanced Micro Devices, Inc.
- Carl R. Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual silicide process to reduce gate resistance
- Patent number 6,391,767
- Issue date May 21, 2002
- Advanced Micro Devices, Inc.
- Carl Robert Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for inhibiting tunnel oxide growth at the edges of a floatin...
- Patent number 6,337,246
- Issue date Jan 8, 2002
- Advanced Micro Devices, Inc.
- Daniel Sobek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solid-source doping for source/drain to eliminate implant damage
- Patent number 6,329,273
- Issue date Dec 11, 2001
- Advanced Micro Devices, Inc.
- Timothy Thurgate
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two bit flash cell with two floating gate regions
- Patent number 6,329,687
- Issue date Dec 11, 2001
- Advanced Micro Devices, Inc.
- Daniel Sobek
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for inhibiting tunnel oxide growth at the edges of a floatin...
- Patent number 6,268,624
- Issue date Jul 31, 2001
- Advanced Micro Devices, Inc.
- Daniel Sobek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitride plug to reduce gate edge lifting
- Patent number 6,255,165
- Issue date Jul 3, 2001
- Advanced Micro Devices, Inc.
- Timothy Thurgate
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing asymmetric channel transistor
- Patent number 6,242,329
- Issue date Jun 5, 2001
- Advanced Micro Devices, Inc.
- Carl Robert Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of etch to blunt gate corners
- Patent number 6,238,978
- Issue date May 29, 2001
- Advanced Micro Devices, Inc.
- Carl Robert Huster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-uniform gate doping for reduced overlap capacitance
- Patent number 6,229,198
- Issue date May 8, 2001
- Advanced Micro Devices, Inc.
- Effiong Ibok
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removable photoresist spacers in CMOS transistor fabrication
- Patent number 6,225,229
- Issue date May 1, 2001
- Advanced Micro Devices, Inc.
- Carl R. Huster
- H01 - BASIC ELECTRIC ELEMENTS

Carl R. Huster

Person

Patents Grantslast 30 patents

Asymmetric retrograde halo metal-oxide-semiconductor field-effect t...

Selective epitaxy to reduce gate/gate dielectric interface roughness

Method of making recessed source drains to reduce fringing capacitance

Deposited screen oxide for reducing gate edge lifting

Method of programming a non-volatile memory cell using a vertical e...

Epitaxial delta doping for retrograde channel profile

Optimized single side pocket implant location for a field effect tr...

MOSFET with metal in gate for reduced gate resistance

Dual silicide process to reduce gate resistance

Method for inhibiting tunnel oxide growth at the edges of a floatin...

Solid-source doping for source/drain to eliminate implant damage

Two bit flash cell with two floating gate regions

Method for inhibiting tunnel oxide growth at the edges of a floatin...

Nitride plug to reduce gate edge lifting

Method for manufacturing asymmetric channel transistor

Use of etch to blunt gate corners

Non-uniform gate doping for reduced overlap capacitance

Removable photoresist spacers in CMOS transistor fabrication