Carlos Dangelo

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Carbon nanotube-based structures and methods for removing heat from...
- Patent number 8,080,871
- Issue date Dec 20, 2011
- Samsung Electronics Co., Ltd.
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Grant
System and method using self-assembled nano structures in the desig...
- Patent number 8,039,953
- Issue date Oct 18, 2011
- Samsung Electronics Co., Ltd.
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Nanoengineered thermal materials based on carbon nanotube array com...
- Patent number 7,784,531
- Issue date Aug 31, 2010
- The United States of America as represented by the administrator of the Natio...
- Jun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vapor chamber heat sink having a carbon nanotube fluid interface
- Patent number 7,732,918
- Issue date Jun 8, 2010
- Nanoconduction, Inc.
- Carlos Dangelo
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
In-chip structures and methods for removing heat from integrated ci...
- Patent number 7,656,027
- Issue date Feb 2, 2010
- Nanoconduction, Inc.
- Carlos Dangelo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit micro-cooler having multi-layers of tubes of a C...
- Patent number 7,538,422
- Issue date May 26, 2009
- Nanoconduction Inc.
- Carlos Dangelo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method using self-assembled nano structures in the desig...
- Patent number 7,109,581
- Issue date Sep 19, 2006
- Nanoconduction, Inc.
- Carlos Dangelo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
METHOD AND SYSTEM FOR CREATING, DERIVING AND VALIDATING STRUCTURAL...
- Patent number 6,470,482
- Issue date Oct 22, 2002
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 6,324,678
- Issue date Nov 27, 2001
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating, validating, and scaling structural...
- Patent number 6,216,252
- Issue date Apr 10, 2001
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Object-oriented multi-media architecture
- Patent number 5,946,487
- Issue date Aug 31, 1999
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and verifying structural logic model...
- Patent number 5,933,356
- Issue date Aug 3, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Specification and design of complex digital systems
- Patent number 5,910,897
- Issue date Jun 8, 1999
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit device having a switched routing network
- Patent number 5,898,677
- Issue date Apr 27, 1999
- LSI Logic Corporation
- Richard Deeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methodology for deriving executable low-level structural descriptio...
- Patent number 5,880,971
- Issue date Mar 9, 1999
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low-level description...
- Patent number 5,870,308
- Issue date Feb 9, 1999
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing and exercising individual, unsingulated dies on a wafer
- Patent number 5,838,163
- Issue date Nov 17, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 5,801,958
- Issue date Sep 1, 1998
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable microsystems in silicon
- Patent number 5,665,989
- Issue date Sep 9, 1997
- LSI Logic
- Carlos Dangelo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit wafer comprising unsingulated dies, and decoder...
- Patent number 5,648,661
- Issue date Jul 15, 1997
- LSI Logic Corporation
- Michael D. Rostoker
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed internal interconnection technique for integrated circui...
- Patent number 5,615,126
- Issue date Mar 25, 1997
- LSI Logic Corporation
- Richard Deeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating, validating, and scaling structural...
- Patent number 5,598,344
- Issue date Jan 28, 1997
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and verifying structural logic model...
- Patent number 5,572,437
- Issue date Nov 5, 1996
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 5,572,436
- Issue date Nov 5, 1996
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level structural...
- Patent number 5,557,531
- Issue date Sep 17, 1996
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 5,555,201
- Issue date Sep 10, 1996
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 5,553,002
- Issue date Sep 3, 1996
- LSI Logic Corporation
- Carlos Dangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 5,544,066
- Issue date Aug 6, 1996
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating, deriving and validating structural...
- Patent number 5,544,067
- Issue date Aug 6, 1996
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for creating and validating low level description...
- Patent number 5,541,849
- Issue date Jul 30, 1996
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Carbon Nanotube-Based Structures and Methods for Removing Heat from...
- Publication number 20110103020
- Publication date May 5, 2011
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
Structures & Methods for Combining Carbon Nanotube Array and Organi...
- Publication number 20090302295
- Publication date Dec 10, 2009
- Peter Schwartz
- B82 - NANO-TECHNOLOGY
Information Patent Application
VAPOR CHAMBER HEAT SINK HAVING A CARBON NANOTUBE FLUID INTERFACE
- Publication number 20080128116
- Publication date Jun 5, 2008
- Carlos Dangelo
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Application
NANOENGINEERED THERMAL MATERIALS BASED ON CARBON NANOTUBE ARRAY COM...
- Publication number 20070163769
- Publication date Jul 19, 2007
- Jun Li
- B82 - NANO-TECHNOLOGY
Information Patent Application
Integrated Circuit Micro-Cooler Having Tubes of a CNT Array in Esse...
- Publication number 20070126116
- Publication date Jun 7, 2007
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
INTEGRATED CIRCUIT MICRO-COOLER HAVING MULTI-LAYERS OF TUBES OF A C...
- Publication number 20070114657
- Publication date May 24, 2007
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
Integrated Circuit Micro-Cooler with Double-Sided Tubes of a CNT Array
- Publication number 20070114658
- Publication date May 24, 2007
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method and apparatus for establishing optimal thermal contact betwe...
- Publication number 20070097648
- Publication date May 3, 2007
- Kevin Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In-chip structures and methods for removing heat from integrated ci...
- Publication number 20060278901
- Publication date Dec 14, 2006
- Carlos Dangelo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method using self-assembled nano structures in the desig...
- Publication number 20060270116
- Publication date Nov 30, 2006
- Nanoconduction, Inc.
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
Apparatus and method for cooling ICs using nano-rod based chip-leve...
- Publication number 20060231237
- Publication date Oct 19, 2006
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
System and method using self-assembled nano structures in the desig...
- Publication number 20050046017
- Publication date Mar 3, 2005
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method and apparatus for the use of self-assembled nanowires for th...
- Publication number 20040152240
- Publication date Aug 5, 2004
- Carlos Dangelo
- B82 - NANO-TECHNOLOGY

Carlos Dangelo

Person

Patents Grantslast 30 patents

Carbon nanotube-based structures and methods for removing heat from...

System and method using self-assembled nano structures in the desig...

Nanoengineered thermal materials based on carbon nanotube array com...

Vapor chamber heat sink having a carbon nanotube fluid interface

In-chip structures and methods for removing heat from integrated ci...

Integrated circuit micro-cooler having multi-layers of tubes of a C...

System and method using self-assembled nano structures in the desig...

METHOD AND SYSTEM FOR CREATING, DERIVING AND VALIDATING STRUCTURAL...

Method and system for creating and validating low level description...

Method and system for creating, validating, and scaling structural...

Object-oriented multi-media architecture

Method and system for creating and verifying structural logic model...

Specification and design of complex digital systems

Integrated circuit device having a switched routing network

Methodology for deriving executable low-level structural descriptio...

Method and system for creating and validating low-level description...

Testing and exercising individual, unsingulated dies on a wafer

Method and system for creating and validating low level description...

Programmable microsystems in silicon

Integrated circuit wafer comprising unsingulated dies, and decoder...

High-speed internal interconnection technique for integrated circui...

Method and system for creating, validating, and scaling structural...

Method and system for creating and verifying structural logic model...

Method and system for creating and validating low level description...

Method and system for creating and validating low level structural...

Method and system for creating and validating low level description...

Method and system for creating and validating low level description...

Method and system for creating and validating low level description...

Method and system for creating, deriving and validating structural...

Method and system for creating and validating low level description...

Patents Applicationslast 30 patents

Carbon Nanotube-Based Structures and Methods for Removing Heat from...

Structures & Methods for Combining Carbon Nanotube Array and Organi...

VAPOR CHAMBER HEAT SINK HAVING A CARBON NANOTUBE FLUID INTERFACE

NANOENGINEERED THERMAL MATERIALS BASED ON CARBON NANOTUBE ARRAY COM...

Integrated Circuit Micro-Cooler Having Tubes of a CNT Array in Esse...

INTEGRATED CIRCUIT MICRO-COOLER HAVING MULTI-LAYERS OF TUBES OF A C...

Integrated Circuit Micro-Cooler with Double-Sided Tubes of a CNT Array

Method and apparatus for establishing optimal thermal contact betwe...

In-chip structures and methods for removing heat from integrated ci...

System and method using self-assembled nano structures in the desig...

Apparatus and method for cooling ICs using nano-rod based chip-leve...

System and method using self-assembled nano structures in the desig...

Method and apparatus for the use of self-assembled nanowires for th...