Catherine B. Labelle

Person

Schenectady, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Interconnect structures of semiconductor devices having a via struc...
- Patent number 11,380,581
- Issue date Jul 5, 2022
- GLOBALFOUNDRIES U.S. INC.
- Andre P. Labonte
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a gate cap layer above a replacement gate structure
- Patent number 10,199,479
- Issue date Feb 5, 2019
- GLOBALFOUNDRIES Inc.
- Gunter Grasshoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin cut with alternating two color fin hardmask
- Patent number 9,911,619
- Issue date Mar 6, 2018
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wimpy and nominal semiconductor device structures for vertical finFETs
- Patent number 9,881,842
- Issue date Jan 30, 2018
- International Business Machines Corporation
- Kisup Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET devices having fins with a tapered configuration and methods...
- Patent number 9,875,905
- Issue date Jan 23, 2018
- GLOBALFOUNDRIES, INC.
- Min Gyu Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised fin structures and methods of fabrication
- Patent number 9,837,268
- Issue date Dec 5, 2017
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid fin cutting processes for FinFET semiconductor devices
- Patent number 9,779,960
- Issue date Oct 3, 2017
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of performing concurrent fin and gate cut etch processes fo...
- Patent number 9,761,495
- Issue date Sep 12, 2017
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of semiconductor structures employing selective removal o...
- Patent number 9,722,024
- Issue date Aug 1, 2017
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of performing fin cut etch processes for FinFET semiconduct...
- Patent number 9,548,249
- Issue date Jan 17, 2017
- GLOBALFOUNDRIES Inc.
- Min Gyu Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-strained nanowire and FinFET devices with dielectric isolation
- Patent number 9,431,539
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised fin structures and methods of fabrication
- Patent number 9,391,140
- Issue date Jul 12, 2016
- GLOBALFOUNDRIES Inc.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming gate structures for semiconductor devices using...
- Patent number 9,184,263
- Issue date Nov 10, 2015
- GLOBALFOUNDRIES Inc.
- Xiuyu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ARC residue-free etching
- Patent number 9,064,848
- Issue date Jun 23, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Critical dimension and pattern recognition structures for devices m...
- Patent number 8,932,961
- Issue date Jan 13, 2015
- GLOBALFOUNDRIES Inc.
- Sohan Mehta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ARC residue-free etching
- Patent number 8,901,006
- Issue date Dec 2, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of FinFET gate spacer
- Patent number 8,525,234
- Issue date Sep 3, 2013
- GLOBALFOUNDRIES Inc.
- Douglas Bonser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing features of different depth by placement of vias
- Patent number 8,448,103
- Issue date May 21, 2013
- International Business Machines Corporation
- John C. Arnold
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of FinFET gate spacer
- Patent number 8,174,055
- Issue date May 8, 2012
- GLOBALFOUNDRIES Inc.
- Douglas Bonser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
De-fluorination of wafer surface and related structure
- Patent number 7,049,209
- Issue date May 23, 2006
- International Business Machines Corporation
- Timothy J. Dalton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Scatterometry with grating to observe resist removal rate during etch
- Patent number 6,982,043
- Issue date Jan 3, 2006
- Advanced Micro Devices, Inc.
- Ramkumar Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Situ monitoring of microloading using scatterometry with variable p...
- Patent number 6,793,765
- Issue date Sep 21, 2004
- Advanced Micro Devices, Inc.
- Catherine B. Labelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Effect of substrate surface treatment on 193 NM resist processing
- Patent number 6,746,973
- Issue date Jun 8, 2004
- Advanced Micro Devices, Inc.
- Catherine B. Labelle
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTERCONNECT STRUCTURES OF SEMICONDUCTOR DEVICES
- Publication number 20200152512
- Publication date May 14, 2020
- GLOBALFOUNDRIES INC.
- Andre P. Labonte
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF PERFORMING CONCURRENT FIN AND GATE CUT ETCH PROCESSES FO...
- Publication number 20170243790
- Publication date Aug 24, 2017
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DEVICES HAVING FINS WITH A TAPERED CONFIGURATION AND METHODS...
- Publication number 20170117156
- Publication date Apr 27, 2017
- GLOBALFOUNDRIES, Inc.
- Min Gyu Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID FIN CUTTING PROCESSES FOR FINFET SEMICONDUCTOR DEVICES
- Publication number 20160351411
- Publication date Dec 1, 2016
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RAISED FIN STRUCTURES AND METHODS OF FABRICATION
- Publication number 20160260605
- Publication date Sep 8, 2016
- GLOBALFOUNDRIES INC.
- Yi QI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF PERFORMING FIN CUT ETCH PROCESSES FOR FINFET SEMICONDUCT...
- Publication number 20160254192
- Publication date Sep 1, 2016
- GLOBALFOUNDRIES INC.
- Min Gyu Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL-STRAINED NANOWIRE AND FINFET DEVICES WITH DIELECTRIC ISOLATION
- Publication number 20160104799
- Publication date Apr 14, 2016
- GLOBALFOUNDRIES INC.
- Yi QI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A GATE CAP LAYER ABOVE A REPLACEMENT GATE STRUCTURE
- Publication number 20160056263
- Publication date Feb 25, 2016
- GLOBALFOUNDRIES INC.
- Gunter Grasshoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RAISED FIN STRUCTURES AND METHODS OF FABRICATION
- Publication number 20150372084
- Publication date Dec 24, 2015
- GLOBALFOUNDRIES INC.
- Yi QI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING GATE STRUCTURES FOR SEMICONDUCTOR DEVICES USING...
- Publication number 20150187905
- Publication date Jul 2, 2015
- GLOBALFOUNDRIES INC.
- Xiuyu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARC RESIDUE-FREE ETCHING
- Publication number 20150054179
- Publication date Feb 26, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Xiang HU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CRITICAL DIMENSION AND PATTERN RECOGNITION STRUCTURES FOR DEVICES M...
- Publication number 20150050811
- Publication date Feb 19, 2015
- GLOBALFOUNDRIES INC.
- Sohan Mehta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING TAILORED CHAMFERE...
- Publication number 20130224944
- Publication date Aug 29, 2013
- GLOBALFOUNDRIES INC.
- Puneet Khanna
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Critical Dimension and Pattern Recognition Structures for Devices M...
- Publication number 20130207108
- Publication date Aug 15, 2013
- GLOBALFOUNDRIES INC.
- Sohan Mehta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming a Gate Cap Layer Above a Replacement Gate Struct...
- Publication number 20130181265
- Publication date Jul 18, 2013
- GLOBALFOUNDRIES INC.
- Gunter Grasshoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARC RESIDUE-FREE ETCHING
- Publication number 20120256299
- Publication date Oct 11, 2012
- Xiang HU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING FEATURES OF DIFFERENT DEPTH BY PLACEMENT OF VIAS
- Publication number 20120198403
- Publication date Aug 2, 2012
- GLOBALFOUNDRIES INC.
- John C. Arnold
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF FINFET GATE SPACER
- Publication number 20120168833
- Publication date Jul 5, 2012
- GLOBALFOUNDRIES INC.
- Douglas Bonser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF FINFET GATE SPACER
- Publication number 20110198673
- Publication date Aug 18, 2011
- GLOBALFOUNDRIES INC.
- Douglas Bonser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING FINFET SEMICONDUCTOR DEVICES USING ASHABLE...
- Publication number 20100267237
- Publication date Oct 21, 2010
- Advanced Micro Devices, Inc.
- Douglas J. Bonser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PREVENTING DAMAGE TO INTERLEVEL DIELECTRIC
- Publication number 20070072412
- Publication date Mar 29, 2007
- International Business Machines Corporation
- Derren N. Dunn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for integrating a high-k gate dielectric in a transistor fab...
- Publication number 20050101147
- Publication date May 12, 2005
- Advanced Micro Devices, Inc.
- Catherine B. Labelle
- H01 - BASIC ELECTRIC ELEMENTS

Catherine B. Labelle

Person

Patents Grantslast 30 patents

Interconnect structures of semiconductor devices having a via struc...

Methods of forming a gate cap layer above a replacement gate structure

Fin cut with alternating two color fin hardmask

Wimpy and nominal semiconductor device structures for vertical finFETs

FinFET devices having fins with a tapered configuration and methods...

Raised fin structures and methods of fabrication

Hybrid fin cutting processes for FinFET semiconductor devices

Methods of performing concurrent fin and gate cut etch processes fo...

Formation of semiconductor structures employing selective removal o...

Methods of performing fin cut etch processes for FinFET semiconduct...

Dual-strained nanowire and FinFET devices with dielectric isolation

Raised fin structures and methods of fabrication

Methods of forming gate structures for semiconductor devices using...

ARC residue-free etching

Critical dimension and pattern recognition structures for devices m...

ARC residue-free etching

Formation of FinFET gate spacer

Manufacturing features of different depth by placement of vias

Formation of FinFET gate spacer

De-fluorination of wafer surface and related structure

Scatterometry with grating to observe resist removal rate during etch

Situ monitoring of microloading using scatterometry with variable p...

Effect of substrate surface treatment on 193 NM resist processing

Patents Applicationslast 30 patents

INTERCONNECT STRUCTURES OF SEMICONDUCTOR DEVICES

METHODS OF PERFORMING CONCURRENT FIN AND GATE CUT ETCH PROCESSES FO...

FINFET DEVICES HAVING FINS WITH A TAPERED CONFIGURATION AND METHODS...

HYBRID FIN CUTTING PROCESSES FOR FINFET SEMICONDUCTOR DEVICES

RAISED FIN STRUCTURES AND METHODS OF FABRICATION

METHODS OF PERFORMING FIN CUT ETCH PROCESSES FOR FINFET SEMICONDUCT...

DUAL-STRAINED NANOWIRE AND FINFET DEVICES WITH DIELECTRIC ISOLATION

METHODS OF FORMING A GATE CAP LAYER ABOVE A REPLACEMENT GATE STRUCTURE

RAISED FIN STRUCTURES AND METHODS OF FABRICATION

METHODS OF FORMING GATE STRUCTURES FOR SEMICONDUCTOR DEVICES USING...

ARC RESIDUE-FREE ETCHING

CRITICAL DIMENSION AND PATTERN RECOGNITION STRUCTURES FOR DEVICES M...

METHODS FOR FABRICATING INTEGRATED CIRCUITS USING TAILORED CHAMFERE...

Critical Dimension and Pattern Recognition Structures for Devices M...

Methods of Forming a Gate Cap Layer Above a Replacement Gate Struct...

ARC RESIDUE-FREE ETCHING

MANUFACTURING FEATURES OF DIFFERENT DEPTH BY PLACEMENT OF VIAS

FORMATION OF FINFET GATE SPACER

FORMATION OF FINFET GATE SPACER

METHODS FOR FABRICATING FINFET SEMICONDUCTOR DEVICES USING ASHABLE...

PREVENTING DAMAGE TO INTERLEVEL DIELECTRIC

Method for integrating a high-k gate dielectric in a transistor fab...