Chan Lap

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method of enterprise action item planning, executing, tr...
- Patent number 9,262,732
- Issue date Feb 16, 2016
- SAP SE
- Bin Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Content management systems and methods
- Patent number 9,015,629
- Issue date Apr 21, 2015
- SAP SE
- Lap Chan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method to fabricate horizontal air columns underneath metal inductor
- Patent number 7,573,081
- Issue date Aug 11, 2009
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a cross network of air gaps within IMD layer
- Patent number 7,112,866
- Issue date Sep 26, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fabricate horizontal air columns underneath metal inductor
- Patent number 7,105,420
- Issue date Sep 12, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Extended poly buffer STI scheme
- Patent number 7,060,573
- Issue date Jun 13, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Victor Seng Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Application of single exposure alternating aperture phase shift mas...
- Patent number 7,037,791
- Issue date May 2, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Lay Cheng Choo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a region of low dielectric constant nanoporous m...
- Patent number 6,899,857
- Issue date May 31, 2005
- Chartered Semiconductors Manufactured Limited
- Soo Choi Pheng
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Grant
Method to achieve STI planarization
- Patent number 6,869,857
- Issue date Mar 22, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Feng Dai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form C54 TiSi2 for IC device fabrication
- Patent number 6,777,329
- Issue date Aug 17, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Shaoyin Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a self-aligned CMOS inverter using vertical device i...
- Patent number 6,747,314
- Issue date Jun 8, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Ravi Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a cross network of air gaps within IMD layer
- Patent number 6,730,571
- Issue date May 4, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming variable-K gate dielectric
- Patent number 6,709,934
- Issue date Mar 23, 2004
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to encapsulate copper plug for interconnect metallization
- Patent number 6,696,761
- Issue date Feb 24, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Effective isolation with high aspect ratio shallow trench isolation...
- Patent number 6,680,239
- Issue date Jan 20, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Cher Liang Cha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form shallow junction transistors while eliminating short...
- Patent number 6,566,209
- Issue date May 20, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Incorporation of dielectric layer onto SThM tips for direct thermal...
- Patent number 6,566,650
- Issue date May 20, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Chang Chaun Hu
- G01 - MEASURING TESTING
Information Patent Grant
Method to form elevated source/drain using poly spacer
- Patent number 6,566,208
- Issue date May 20, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a vertical transistor by first forming a gate/spacer...
- Patent number 6,544,824
- Issue date Apr 8, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Yelehanka Pradeep
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form self-aligned source/drain CMOS device on insulated s...
- Patent number 6,541,327
- Issue date Apr 1, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow junction transistors which eliminating shorts due to juncti...
- Patent number 6,531,750
- Issue date Mar 11, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form and/or isolate vertical transistors
- Patent number 6,511,884
- Issue date Jan 28, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Elgin Quek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to deposit a seeding layer for electroless copper plating
- Patent number 6,495,200
- Issue date Dec 17, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Self-aligned elevated transistor
- Patent number 6,483,148
- Issue date Nov 19, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form an air-gap under the edges of a gate electrode by us...
- Patent number 6,468,877
- Issue date Oct 22, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yelehanka Ramachandramurthy Pradeep
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Passivation of copper interconnect surfaces with a passivating meta...
- Patent number 6,468,906
- Issue date Oct 22, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a self-aligned CMOS inverter using vertical device i...
- Patent number 6,461,900
- Issue date Oct 8, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Ravi Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form an inverted staircase STI structure by etch-depositi...
- Patent number 6,461,887
- Issue date Oct 8, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yelehanka Ramachandramurthy Pradeep
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form very high mobility vertical channel transistor by se...
- Patent number 6,455,377
- Issue date Sep 24, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a vertical transistor by selective epitaxial growth...
- Patent number 6,440,800
- Issue date Aug 27, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS TO REACH TARGET CUSTOMERS AT THE RIGHT TIME VIA...
- Publication number 20140188552
- Publication date Jul 3, 2014
- Lap Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Content Management Systems and Methods
- Publication number 20140123068
- Publication date May 1, 2014
- Lap Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Business to Consumer Marketing
- Publication number 20130317907
- Publication date Nov 28, 2013
- SAP AG
- Bin Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method of Enterprise Action Item Planning, Executing, Tr...
- Publication number 20120331036
- Publication date Dec 27, 2012
- SAP AG
- Bin Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Media for Service and Marketing
- Publication number 20100169159
- Publication date Jul 1, 2010
- Nicholas Rose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICAL USER INTERFACE UNIT FOR PROVISIONING AND EDITING OF BUSIN...
- Publication number 20100146452
- Publication date Jun 10, 2010
- NICHOLAS ROSE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method to fabricate horizontal air columns underneath metal inductor
- Publication number 20070007623
- Publication date Jan 11, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Application of single exposure alternating aperture phase shift mas...
- Publication number 20060194397
- Publication date Aug 31, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Lay Cheng Choo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form a cross network of air gaps within IMD layer
- Publication number 20040175896
- Publication date Sep 9, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO ENCAPSULATE COPPER PLUG FOR INTERCONNECT METALLIZATION
- Publication number 20040009664
- Publication date Jan 15, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Novel method to achieve STI planarization
- Publication number 20030104676
- Publication date Jun 5, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Feng Dai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a region of low dielectric constant nanoporous m...
- Publication number 20030092251
- Publication date May 15, 2003
- CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
- Soo Choi Pheng
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Application
Method to form a self-aligned CMOS inverter using vertical device i...
- Publication number 20030075758
- Publication date Apr 24, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Ravi Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to improve latchup by forming selective sloped staircase STI...
- Publication number 20030017710
- Publication date Jan 23, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Pan Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming variable-K gate dielectric
- Publication number 20020173106
- Publication date Nov 21, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Novel method to form C54 TiSi2 for IC device fabrication
- Publication number 20020155703
- Publication date Oct 24, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Shaoyin Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SELF ALIGNED S/D CMOS DEVICE ON INSULATED...
- Publication number 20020102798
- Publication date Aug 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming variable-K gate dielectric
- Publication number 20020100947
- Publication date Aug 1, 2002
- Chartered Semiconductor Manufacturing Inc.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form a vertical transistor by selective epitaxial growth...
- Publication number 20020102784
- Publication date Aug 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMPLIFIED METHOD TO REDUCE OR ELIMINATE STI OXIDE DIVOTS
- Publication number 20020098661
- Publication date Jul 25, 2002
- Randall Cher Liang Cha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form very high mobility vertical channel transistor by se...
- Publication number 20020098655
- Publication date Jul 25, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Extended poly buffer STI scheme
- Publication number 20020094648
- Publication date Jul 18, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Victor Seng Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned elevated transistor
- Publication number 20020090787
- Publication date Jul 11, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-LEAKAGE DRAM STRUCTURES USING SELECTIVE SILICON EPITAXIAL GROWT...
- Publication number 20020052077
- Publication date May 2, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Kheng Chok Tee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form shallow junction transistors while eliminating short...
- Publication number 20020011629
- Publication date Jan 31, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form shallow junction transistors while eliminating short...
- Publication number 20020003264
- Publication date Jan 10, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

System and method of enterprise action item planning, executing, tr...

Content management systems and methods

Method to fabricate horizontal air columns underneath metal inductor

Method to form a cross network of air gaps within IMD layer

Method to fabricate horizontal air columns underneath metal inductor

Extended poly buffer STI scheme

Application of single exposure alternating aperture phase shift mas...

Method for forming a region of low dielectric constant nanoporous m...

Method to achieve STI planarization

Method to form C54 TiSi2 for IC device fabrication

Method to form a self-aligned CMOS inverter using vertical device i...

Method to form a cross network of air gaps within IMD layer

Method for forming variable-K gate dielectric

Method to encapsulate copper plug for interconnect metallization

Effective isolation with high aspect ratio shallow trench isolation...

Method to form shallow junction transistors while eliminating short...

Incorporation of dielectric layer onto SThM tips for direct thermal...

Method to form elevated source/drain using poly spacer

Method to form a vertical transistor by first forming a gate/spacer...

Method to form self-aligned source/drain CMOS device on insulated s...

Shallow junction transistors which eliminating shorts due to juncti...

Method to form and/or isolate vertical transistors

Method to deposit a seeding layer for electroless copper plating

Self-aligned elevated transistor

Method to form an air-gap under the edges of a gate electrode by us...

Passivation of copper interconnect surfaces with a passivating meta...

Method to form a self-aligned CMOS inverter using vertical device i...

Method to form an inverted staircase STI structure by etch-depositi...

Method to form very high mobility vertical channel transistor by se...

Method to form a vertical transistor by selective epitaxial growth...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS TO REACH TARGET CUSTOMERS AT THE RIGHT TIME VIA...

Content Management Systems and Methods

Business to Consumer Marketing

System and Method of Enterprise Action Item Planning, Executing, Tr...

Media for Service and Marketing

GRAPHICAL USER INTERFACE UNIT FOR PROVISIONING AND EDITING OF BUSIN...

Method to fabricate horizontal air columns underneath metal inductor

Application of single exposure alternating aperture phase shift mas...

Method to form a cross network of air gaps within IMD layer

METHOD TO ENCAPSULATE COPPER PLUG FOR INTERCONNECT METALLIZATION

Novel method to achieve STI planarization

Method for forming a region of low dielectric constant nanoporous m...

Method to form a self-aligned CMOS inverter using vertical device i...

Method to improve latchup by forming selective sloped staircase STI...

Method for forming variable-K gate dielectric

Novel method to form C54 TiSi2 for IC device fabrication

METHOD FOR FABRICATING A SELF ALIGNED S/D CMOS DEVICE ON INSULATED...

Method for forming variable-K gate dielectric

Method to form a vertical transistor by selective epitaxial growth...

SIMPLIFIED METHOD TO REDUCE OR ELIMINATE STI OXIDE DIVOTS

Method to form very high mobility vertical channel transistor by se...

Extended poly buffer STI scheme

Self-aligned elevated transistor

LOW-LEAKAGE DRAM STRUCTURES USING SELECTIVE SILICON EPITAXIAL GROWT...

Method to form shallow junction transistors while eliminating short...

Method to form shallow junction transistors while eliminating short...