Chi-Hsing Hsu

Person

Hsin-Tien City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Portable electronic device and image capturing module thereof
- Patent number 9,860,431
- Issue date Jan 2, 2018
- Chi-Hsing Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Portable electronic device and image capturing module thereof
- Patent number 9,786,709
- Issue date Oct 10, 2017
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package and stacked structure of chip packages
- Patent number 7,642,634
- Issue date Jan 5, 2010
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device with flexible heat spreader
- Patent number 7,608,923
- Issue date Oct 27, 2009
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package and package module of the package
- Patent number 7,547,965
- Issue date Jun 16, 2009
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip structure with bevel pad row
- Patent number 7,485,974
- Issue date Feb 3, 2009
- VIA Technologies, Inc.
- Yuan-Tsang Liaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Firmware update for optical disc drive
- Patent number 7,480,904
- Issue date Jan 20, 2009
- Mediatek Incorporation
- Chi-Chun Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-conducting through hole structure
- Patent number 7,470,864
- Issue date Dec 30, 2008
- VIA Technologies, Inc.
- Kwun-Yao Ho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Chip structure with arrangement of side pads
- Patent number 7,449,788
- Issue date Nov 11, 2008
- VIA Technologies, Inc.
- Yuan-Tsang Liaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit substrate and method of manufacturing plated through slot t...
- Patent number 7,382,629
- Issue date Jun 3, 2008
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Signal transmission structure and circuit substrate thereof
- Patent number 7,378,601
- Issue date May 27, 2008
- VIA Technologies, Inc.
- Jimmy Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-chip structure
- Patent number 7,365,418
- Issue date Apr 29, 2008
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bumpless chip package
- Patent number 7,361,982
- Issue date Apr 22, 2008
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Signal transmission structure and circuit substrate thereof
- Patent number 7,291,916
- Issue date Nov 6, 2007
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor packaging substrate and method of producing the same
- Patent number 7,253,526
- Issue date Aug 7, 2007
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Chip package with embedded component
- Patent number 7,230,332
- Issue date Jun 12, 2007
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package with embedded panel-shaped component
- Patent number 7,224,062
- Issue date May 29, 2007
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit structure of package substrate
- Patent number 7,193,324
- Issue date Mar 20, 2007
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuit carrier and package structure thereof
- Patent number 7,145,234
- Issue date Dec 5, 2006
- VIA Technologies, Inc.
- Kenny Chang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Chip package and electrical connection structure between chip and s...
- Patent number 7,129,568
- Issue date Oct 31, 2006
- VIA Technologies, Inc.
- Sheng-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip package and process of forming the same
- Patent number 7,129,146
- Issue date Oct 31, 2006
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Surrounding structure for a probe card
- Patent number 7,053,638
- Issue date May 30, 2006
- VIA Technologies Inc.
- Chi-Hsing Hsu
- G01 - MEASURING TESTING
Information Patent Grant
Chip package structure with glass substrate
- Patent number 7,038,309
- Issue date May 2, 2006
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packaging substrate and method of producing the same
- Patent number 6,946,738
- Issue date Sep 20, 2005
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Quad flat no-lead chip carrier
- Patent number 6,882,057
- Issue date Apr 19, 2005
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip-chip die and flip-chip package substrate
- Patent number 6,861,740
- Issue date Mar 1, 2005
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Flip chip package carrier
- Patent number 6,809,262
- Issue date Oct 26, 2004
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Flip-chip package substrate
- Patent number 6,777,804
- Issue date Aug 17, 2004
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Flip-chip package substrate
- Patent number 6,774,498
- Issue date Aug 10, 2004
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip-chip package substrate
- Patent number 6,740,965
- Issue date May 25, 2004
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
DETECTION SWITCH SYSTEM FOR VIDEO OPERATION MODULES
- Publication number 20120140121
- Publication date Jun 7, 2012
- GIGA-BYTE TECHNOLOGY CO., LTD.
- HOU-YUAN LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible thin image-sensing module with anti-EMI function and flexi...
- Publication number 20100258343
- Publication date Oct 14, 2010
- Chi-Hsing Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Image-sensing module for reducing overall thickness thereof and pre...
- Publication number 20100134985
- Publication date Jun 3, 2010
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Image-sensing chip package module for reducing its whole thickness
- Publication number 20090273698
- Publication date Nov 5, 2009
- Chi-Hsing Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Firmware Update for Storage Device
- Publication number 20090094414
- Publication date Apr 9, 2009
- Chi-Chun Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic device with package module
- Publication number 20090045505
- Publication date Feb 19, 2009
- VIA Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE
- Publication number 20080197503
- Publication date Aug 21, 2008
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP STRUCTURE
- Publication number 20080116585
- Publication date May 22, 2008
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
- Publication number 20080093733
- Publication date Apr 24, 2008
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE PAD ARRANGEMENT AND BUMPLESS CHIP PACKAGE APPLYING THE SAME
- Publication number 20080042257
- Publication date Feb 21, 2008
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MULTI-CHIP STRUCTURE
- Publication number 20080036062
- Publication date Feb 14, 2008
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
- Publication number 20070278661
- Publication date Dec 6, 2007
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CHIP PACKAGE
- Publication number 20070257361
- Publication date Nov 8, 2007
- VIA TECHNOLOGIES, INC.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chip package and stacked structure of chip packages
- Publication number 20070194426
- Publication date Aug 23, 2007
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package and package module of the package
- Publication number 20070108625
- Publication date May 17, 2007
- Via Technologies, Inc.
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bumpless chip package
- Publication number 20070040259
- Publication date Feb 22, 2007
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit substrate and method of manufacturing plated through slot t...
- Publication number 20070017697
- Publication date Jan 25, 2007
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Die pad arrangement and bumpless chip package applying the same
- Publication number 20070013079
- Publication date Jan 18, 2007
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Chip structure with bevel pad row
- Publication number 20060261497
- Publication date Nov 23, 2006
- Yuan-Tsang Liaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chip structure with arrangement of side pads
- Publication number 20060261496
- Publication date Nov 23, 2006
- Yuan-Tsang Liaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bump-less chip package
- Publication number 20060163723
- Publication date Jul 27, 2006
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chip package
- Publication number 20060157847
- Publication date Jul 20, 2006
- Chi-Hsing Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnection structure through passive component
- Publication number 20060158863
- Publication date Jul 20, 2006
- Chi-Hsing Hsu
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Signal transmission structure and circuit substrate thereof
- Publication number 20060108143
- Publication date May 25, 2006
- Jimmy Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuit substrate and method of manufacturing plated through slot t...
- Publication number 20060081396
- Publication date Apr 20, 2006
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CIRCUIT STRUCTURE
- Publication number 20060081990
- Publication date Apr 20, 2006
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Signal transmission structure and circuit substrate thereof
- Publication number 20060065434
- Publication date Mar 30, 2006
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Firmware Update for Optical Disc Drive
- Publication number 20060059300
- Publication date Mar 16, 2006
- Chi-Chun Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-conducting through hole structure
- Publication number 20060012030
- Publication date Jan 19, 2006
- Kwun-Yao Ho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Flip chip package and process of forming the same
- Publication number 20050253275
- Publication date Nov 17, 2005
- Chi-Hsing Hsu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Chi-Hsing Hsu

Person

Patents Grantslast 30 patents

Portable electronic device and image capturing module thereof

Portable electronic device and image capturing module thereof

Chip package and stacked structure of chip packages

Electronic device with flexible heat spreader

Package and package module of the package

Chip structure with bevel pad row

Firmware update for optical disc drive

Multi-conducting through hole structure

Chip structure with arrangement of side pads

Circuit substrate and method of manufacturing plated through slot t...

Signal transmission structure and circuit substrate thereof

Multi-chip structure

Bumpless chip package

Signal transmission structure and circuit substrate thereof

Semiconductor packaging substrate and method of producing the same

Chip package with embedded component

Chip package with embedded panel-shaped component

Circuit structure of package substrate

Circuit carrier and package structure thereof

Chip package and electrical connection structure between chip and s...

Flip chip package and process of forming the same

Surrounding structure for a probe card

Chip package structure with glass substrate

Semiconductor packaging substrate and method of producing the same

Quad flat no-lead chip carrier

Flip-chip die and flip-chip package substrate

Flip chip package carrier

Flip-chip package substrate

Flip-chip package substrate

Flip-chip package substrate

Patents Applicationslast 30 patents

DETECTION SWITCH SYSTEM FOR VIDEO OPERATION MODULES

Flexible thin image-sensing module with anti-EMI function and flexi...

Image-sensing module for reducing overall thickness thereof and pre...

Image-sensing chip package module for reducing its whole thickness

Firmware Update for Storage Device

Electronic device with package module

CHIP PACKAGE

MULTI-CHIP STRUCTURE

CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

DIE PAD ARRANGEMENT AND BUMPLESS CHIP PACKAGE APPLYING THE SAME

MULTI-CHIP STRUCTURE

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

CHIP PACKAGE

Chip package and stacked structure of chip packages

Package and package module of the package

Bumpless chip package

Circuit substrate and method of manufacturing plated through slot t...

Die pad arrangement and bumpless chip package applying the same

Chip structure with bevel pad row

Chip structure with arrangement of side pads

Bump-less chip package

Chip package

Interconnection structure through passive component

Signal transmission structure and circuit substrate thereof

Circuit substrate and method of manufacturing plated through slot t...

CIRCUIT STRUCTURE

Signal transmission structure and circuit substrate thereof

Firmware Update for Optical Disc Drive

Multi-conducting through hole structure

Flip chip package and process of forming the same