Chih Sieh Teng

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fabrication of field-effect transistor with reduced junction capaci...
- Patent number 7,879,669
- Issue date Feb 1, 2011
- National Semiconductor Corporation
- Chih Sieh Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
P-channel field-effect transistor with reduced junction capacitance
- Patent number 7,145,191
- Issue date Dec 5, 2006
- National Semiconductor Corporation
- Chih Sieh Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of p-channel field-effect transistor for reducing junct...
- Patent number 6,797,576
- Issue date Sep 28, 2004
- National Semiconductor Corporation
- Chih Sieh Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making VLSI capacitors and high Q VLSI inductors using...
- Patent number 6,146,958
- Issue date Nov 14, 2000
- National Semiconductor Corporation
- Ji Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BiCMOS process for forming double-poly MOS and bipolar transistors...
- Patent number 5,943,564
- Issue date Aug 24, 1999
- National Semiconductor Corporation
- Hung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a mixed-signal CMOS circuit that includes non-vo...
- Patent number 5,908,311
- Issue date Jun 1, 1999
- National Semiconductor Corporation
- Min-hwa Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Oblique implantation in forming base of bipolar transistor
- Patent number 5,899,723
- Issue date May 4, 1999
- National Semiconductor Corporation
- Hung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
VLSI capacitors and high Q VLSI inductors using metal-filled via plugs
- Patent number 5,861,647
- Issue date Jan 19, 1999
- National Semiconductor Corporation
- Ji Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single-poly EPROM cell that utilizes a reduced programming voltage...
- Patent number 5,761,126
- Issue date Jun 2, 1998
- National Semiconductor Corporation
- Min-hwa Chi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming planarized field isolation regions
- Patent number 5,733,813
- Issue date Mar 31, 1998
- National Semiconductor Corporation
- Hung Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of oblique implantation in forming emitter of bipolar transistor
- Patent number 5,726,069
- Issue date Mar 10, 1998
- National Semiconductor Corporation
- Hung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming contact openings in a multi-layer structure that...
- Patent number 5,607,873
- Issue date Mar 4, 1997
- National Semiconductor Corporation
- Hung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of oblique implantation in forming base of bipolar transistor
- Patent number 5,605,849
- Issue date Feb 25, 1997
- National Semiconductor Corporation
- Hung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Salicide compatible CMOS process with a differential oxide implant...
- Patent number 5,399,513
- Issue date Mar 21, 1995
- National Semiconductor Corporation
- Tian-I Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double-diffused drain CMOS process using a counterdoping technique
- Patent number 4,956,311
- Issue date Sep 11, 1990
- National Semiconductor Corporation
- Tian-I Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an N+ poly-to- N+ silicon capacitor structure uti...
- Patent number 4,877,751
- Issue date Oct 31, 1989
- National Semiconductor Corporation
- Chih-Sieh Teng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Structure and Fabrication of Field-effect Transistor for Alleviatin...
- Publication number 20120273880
- Publication date Nov 1, 2012
- National Semiconductor Corporation
- Chih Sieh Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and Fabrication of Field-effect Transistor for Alleviatin...
- Publication number 20120181614
- Publication date Jul 19, 2012
- Chih Sieh Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and Fabrication of Field-effect Transistor for Alleviatin...
- Publication number 20120181620
- Publication date Jul 19, 2012
- Constantin Bulucea
- H01 - BASIC ELECTRIC ELEMENTS

Chih Sieh Teng

Person

Patents Grantslast 30 patents

Fabrication of field-effect transistor with reduced junction capaci...

P-channel field-effect transistor with reduced junction capacitance

Fabrication of p-channel field-effect transistor for reducing junct...

Methods for making VLSI capacitors and high Q VLSI inductors using...

BiCMOS process for forming double-poly MOS and bipolar transistors...

Method for forming a mixed-signal CMOS circuit that includes non-vo...

Oblique implantation in forming base of bipolar transistor

VLSI capacitors and high Q VLSI inductors using metal-filled via plugs

Single-poly EPROM cell that utilizes a reduced programming voltage...

Method for forming planarized field isolation regions

Use of oblique implantation in forming emitter of bipolar transistor

Method for forming contact openings in a multi-layer structure that...

Use of oblique implantation in forming base of bipolar transistor

Salicide compatible CMOS process with a differential oxide implant...

Double-diffused drain CMOS process using a counterdoping technique

Method of forming an N+ poly-to- N+ silicon capacitor structure uti...

Patents Applicationslast 30 patents

Structure and Fabrication of Field-effect Transistor for Alleviatin...

Structure and Fabrication of Field-effect Transistor for Alleviatin...

Structure and Fabrication of Field-effect Transistor for Alleviatin...