Christopher Baiocco

Person

Newburgh, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and structure for integrating photonics with CMOs
- Patent number 9,874,693
- Issue date Jan 23, 2018
- The Research Foundation for the State University of New York
- Christopher Baiocco
- G02 - OPTICS
Information Patent Grant
Method and structure to reduce FET threshold voltage shift due to o...
- Patent number 9,431,289
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES Inc.
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure to reduce FET threshold voltage shift due to o...
- Patent number 9,093,495
- Issue date Jul 28, 2015
- International Business Machines Corporation
- Christopher Vincent Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process variability tolerant hard mask for replacement metal gate f...
- Patent number 9,034,748
- Issue date May 19, 2015
- International Business Machines Corporation
- Christopher V. Baiocco
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Metal oxide semiconductor field effect transistor (MOSFET) gate ter...
- Patent number 8,704,332
- Issue date Apr 22, 2014
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal oxide semiconductor field effect transistor (MOSFET) gate ter...
- Patent number 8,629,028
- Issue date Jan 14, 2014
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer and process to enhance the strain in the channel with stress...
- Patent number 8,461,009
- Issue date Jun 11, 2013
- International Business Machines Corporation
- Atul C. Ajmera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS SiGe channel pFET and Si channel nFET devices with minimal STI...
- Patent number 8,053,301
- Issue date Nov 8, 2011
- International Business Machines Corporation
- Daniel J. Jaeger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transistor fabrication with optimized performance
- Patent number 7,883,953
- Issue date Feb 8, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Da Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improved fabrication of a semiconductor using a stress p...
- Patent number 7,531,401
- Issue date May 12, 2009
- International Business Machines Corporation
- Christopher Vincent Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual layer stress liner for MOSFETS
- Patent number 7,521,308
- Issue date Apr 21, 2009
- International Business Machines Corporation
- Deleep R. Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure of static random access memory with stress engineering fo...
- Patent number 7,471,548
- Issue date Dec 30, 2008
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench sidewall passivation for lateral RIE in a selective silicon-...
- Patent number 7,081,397
- Issue date Jul 25, 2006
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND STRUCTURE FOR INTEGRATING PHOTONICS WITH CMOS
- Publication number 20160363729
- Publication date Dec 15, 2016
- The Research Foundation for the State University of the New York
- Christopher Baiocco
- G02 - OPTICS
Information Patent Application
Method and Structure to Reduce FET Threshold Voltage Shift Due to O...
- Publication number 20150287629
- Publication date Oct 8, 2015
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS VARIABILITY TOLERANT HARD MASK FOR REPLACEMENT METAL GATE F...
- Publication number 20150064897
- Publication date Mar 5, 2015
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TER...
- Publication number 20130337624
- Publication date Dec 19, 2013
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TER...
- Publication number 20130334618
- Publication date Dec 19, 2013
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER AND PROCESS TO ENHANCE THE STRAIN IN THE CHANNEL WITH STRESS...
- Publication number 20130256766
- Publication date Oct 3, 2013
- International Business Machines Corporation
- Atul C. AJMERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE TO REDUCE FET THRESHOLD VOLTAGE SHIFT DUE TO O...
- Publication number 20130168780
- Publication date Jul 4, 2013
- International Business Machines Corporation
- Christopher Vincent Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR REDUCTION OF VT-W EFFECT IN HIGH-K METAL G...
- Publication number 20130140670
- Publication date Jun 6, 2013
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOSFET GATE ELECTRODE EMPLOYING ARSENIC-DOPED SILICON-GERMANIUM ALL...
- Publication number 20130032897
- Publication date Feb 7, 2013
- International Business Machines Corporation
- Vijay Narayanan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR REDUCTION OF VT-W EFFECT IN HIGH-K METAL G...
- Publication number 20120187522
- Publication date Jul 26, 2012
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS SIGE CHANNEL PFET AND SI CHANNEL NFET DEVICES WITH MINIMAL STI...
- Publication number 20100244198
- Publication date Sep 30, 2010
- International Business Machines Corporation
- Daniel J. Jaeger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Transistor Fabrication with Optimized Performance
- Publication number 20100078687
- Publication date Apr 1, 2010
- Da Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS ENGINEERING FOR SRAM STABILITY
- Publication number 20090166757
- Publication date Jul 2, 2009
- International Business Machines Corporation
- Christopher V. Baiocco
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR IMPROVED FABRICATION OF A SEMICONDUCTOR USING A STRESS P...
- Publication number 20080191284
- Publication date Aug 14, 2008
- International Business Machines Corporation
- Christopher Vincent Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL LAYER STRESS LINER FOR MOSFETS
- Publication number 20080153217
- Publication date Jun 26, 2008
- Deleep R. Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS ENGINEERING FOR SRAM STABILITY
- Publication number 20080142895
- Publication date Jun 19, 2008
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming CMOS Integrated Circuits Using Gate Sidewall Spa...
- Publication number 20080124859
- Publication date May 29, 2008
- Min Chul Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FET STRUCTURE USING DISPOSABLE SPACER AND STRESS INDUCING LAYER
- Publication number 20080124880
- Publication date May 29, 2008
- Chartered Semiconductor Manufacturing LTD.
- Wenhe Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE/DRAIN IMPLANTATION AND CHANNEL STRAIN TRANSFER USING DIFFERE...
- Publication number 20070254420
- Publication date Nov 1, 2007
- International Business Machines Corporation
- Atul C. Ajmera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER AND PROCESS TO ENHANCE THE STRAIN IN THE CHANNEL WITH STRESS...
- Publication number 20070202654
- Publication date Aug 30, 2007
- International Business Machines Corporation
- Atul C. Ajmera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench sidewall passivation for lateral rie in a selective silicon-...
- Publication number 20060046428
- Publication date Mar 2, 2006
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS

Christopher Baiocco

Person

Patents Grantslast 30 patents

Method and structure for integrating photonics with CMOs

Method and structure to reduce FET threshold voltage shift due to o...

Method and structure to reduce FET threshold voltage shift due to o...

Process variability tolerant hard mask for replacement metal gate f...

Metal oxide semiconductor field effect transistor (MOSFET) gate ter...

Metal oxide semiconductor field effect transistor (MOSFET) gate ter...

Spacer and process to enhance the strain in the channel with stress...

CMOS SiGe channel pFET and Si channel nFET devices with minimal STI...

Method for transistor fabrication with optimized performance

Method for improved fabrication of a semiconductor using a stress p...

Dual layer stress liner for MOSFETS

Structure of static random access memory with stress engineering fo...

Trench sidewall passivation for lateral RIE in a selective silicon-...

Patents Applicationslast 30 patents

METHOD AND STRUCTURE FOR INTEGRATING PHOTONICS WITH CMOS

Method and Structure to Reduce FET Threshold Voltage Shift Due to O...

PROCESS VARIABILITY TOLERANT HARD MASK FOR REPLACEMENT METAL GATE F...

METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TER...

METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TER...

SPACER AND PROCESS TO ENHANCE THE STRAIN IN THE CHANNEL WITH STRESS...

METHOD AND STRUCTURE TO REDUCE FET THRESHOLD VOLTAGE SHIFT DUE TO O...

STRUCTURE AND METHOD FOR REDUCTION OF VT-W EFFECT IN HIGH-K METAL G...

MOSFET GATE ELECTRODE EMPLOYING ARSENIC-DOPED SILICON-GERMANIUM ALL...

STRUCTURE AND METHOD FOR REDUCTION OF VT-W EFFECT IN HIGH-K METAL G...

CMOS SIGE CHANNEL PFET AND SI CHANNEL NFET DEVICES WITH MINIMAL STI...

Method for Transistor Fabrication with Optimized Performance

STRESS ENGINEERING FOR SRAM STABILITY

METHOD FOR IMPROVED FABRICATION OF A SEMICONDUCTOR USING A STRESS P...

DUAL LAYER STRESS LINER FOR MOSFETS

STRESS ENGINEERING FOR SRAM STABILITY

Methods of Forming CMOS Integrated Circuits Using Gate Sidewall Spa...

FET STRUCTURE USING DISPOSABLE SPACER AND STRESS INDUCING LAYER

SOURCE/DRAIN IMPLANTATION AND CHANNEL STRAIN TRANSFER USING DIFFERE...

SPACER AND PROCESS TO ENHANCE THE STRAIN IN THE CHANNEL WITH STRESS...

Trench sidewall passivation for lateral rie in a selective silicon-...