Christopher E. Phillips

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fault tolerant integrated circuit architecture
- Patent number 7,880,497
- Issue date Feb 1, 2011
- Element CXI, LLC
- Steven Hennick Kelem
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Resilient integrated circuit architecture
- Patent number 7,812,629
- Issue date Oct 12, 2010
- Element CXI, LLC
- Steven Hennick Kelem
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fault tolerant integrated circuit architecture
- Patent number 7,705,624
- Issue date Apr 27, 2010
- Element CXI, LLC
- Steven Hennick Kelem
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hierarchical storage architecture for reconfigurable logic configur...
- Patent number 7,502,920
- Issue date Mar 10, 2009
- Intel Corporation
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for compiling high level programming languages into embedded...
- Patent number 6,708,325
- Issue date Mar 16, 2004
- Intel Corporation
- Laurence H. Cooke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable logic for table lookup
- Patent number 6,389,579
- Issue date May 14, 2002
- Chameleon Systems
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control fabric unit including associated configuration memory and P...
- Patent number 6,349,346
- Issue date Feb 19, 2002
- Chameleon Systems, Inc.
- Shaila Hanrahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable program sum of products generator
- Patent number 6,311,200
- Issue date Oct 30, 2001
- Chameleon Systems, Inc.
- Shaila Hanrahan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Behavioral silicon construct architecture and mapping
- Patent number 6,298,472
- Issue date Oct 2, 2001
- Chameleon Systems, Inc.
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuration state memory for functional blocks on a reconfigurabl...
- Patent number 6,288,566
- Issue date Sep 11, 2001
- Chameleon Systems, Inc.
- Shaila Hanrahan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated processor and programmable data path chip for reconfigur...
- Patent number 6,282,627
- Issue date Aug 28, 2001
- Chameleon Systems, Inc.
- Dale Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tagged prefetch and instruction decoder for variable length instruc...
- Patent number 6,237,074
- Issue date May 22, 2001
- National Semiconductor Corp.
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated processor and programmable data path chip for reconfigur...
- Patent number 5,970,254
- Issue date Oct 19, 1999
- Laurence H. Cooke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for compiling high level programming languages into an integ...
- Patent number 5,966,534
- Issue date Oct 12, 1999
- Laurence H. Cooke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preprogramming testing in a field programmable gate array
- Patent number 5,887,002
- Issue date Mar 23, 1999
- Crosspoint Solutions, Inc.
- Laurence H. Cooke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area and time efficient extraction circuit
- Patent number 5,815,736
- Issue date Sep 29, 1998
- National Semiconductor Corporation
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fault testing a pipelined processor
- Patent number 5,699,506
- Issue date Dec 16, 1997
- National Semiconductor Corporation
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable input/output buffer circuit with test capability
- Patent number 5,671,234
- Issue date Sep 23, 1997
- Crosspoint Solutions, Inc.
- Christopher E. Phillips
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input-output circuit for increasing immunity to voltage spikes
- Patent number 5,652,527
- Issue date Jul 29, 1997
- Crosspoint Solutions
- Christopher E. Phillips
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for designating instruction pointers for use by a processor...
- Patent number 5,649,147
- Issue date Jul 15, 1997
- National Semiconductor Corporation
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preprogramming testing in a field programmable gate array
- Patent number 5,623,501
- Issue date Apr 22, 1997
- Crosspoint Solutions Inc.
- Laurence H. Cooke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-arithmetical circular buffer cell availability status indicator...
- Patent number 5,617,543
- Issue date Apr 1, 1997
- National Semiconductor Corporation
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for generating a demand-based gated clock
- Patent number 5,598,112
- Issue date Jan 28, 1997
- National Semiconductor Corporation
- Christopher E. Phillips
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Partitioned decode circuit for low power operation
- Patent number 5,546,353
- Issue date Aug 13, 1996
- National Semiconductor Corporation
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexer with level shift capabilities
- Patent number 5,534,798
- Issue date Jul 9, 1996
- Crosspoint Solutions, Inc.
- Christopher E. Phillips
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Preprogramming testing in a field programmable gate array
- Patent number 5,347,519
- Issue date Sep 13, 1994
- Crosspoint Solutions Inc.
- Laurence H. Cooke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable input/output buffer circuit with test capability
- Patent number 5,221,865
- Issue date Jun 22, 1993
- Crosspoint Solutions, Inc.
- Christopher E. Phillips
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Fault Tolerant Integrated Circuit Architecture
- Publication number 20100033207
- Publication date Feb 11, 2010
- Element CXI, LLC
- Steven Hennick Kelem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resilient Integrated Circuit Architecture
- Publication number 20090134906
- Publication date May 28, 2009
- Element CXI, LLC
- Steven Hennick Kelem
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fault Tolerant Integrated Circuit Architecture
- Publication number 20090134907
- Publication date May 28, 2009
- Element CXI, LLC
- Steven Hennick Kelem
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Hierarchical storage architecture for reconfigurable logic configur...
- Publication number 20050204122
- Publication date Sep 15, 2005
- Christopher E. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient high performance data operation element for use in a reco...
- Publication number 20030088757
- Publication date May 8, 2003
- Joshua Lindner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR COMPILING HIGH LEVEL PROGRAMMING LANGUAGES
- Publication number 20030014743
- Publication date Jan 16, 2003
- LAURENCE H. COOKE
- G06 - COMPUTING CALCULATING COUNTING

Christopher E. Phillips

Person

Patents Grantslast 30 patents

Fault tolerant integrated circuit architecture

Resilient integrated circuit architecture

Fault tolerant integrated circuit architecture

Hierarchical storage architecture for reconfigurable logic configur...

Method for compiling high level programming languages into embedded...

Reconfigurable logic for table lookup

Control fabric unit including associated configuration memory and P...

Reconfigurable program sum of products generator

Behavioral silicon construct architecture and mapping

Configuration state memory for functional blocks on a reconfigurabl...

Integrated processor and programmable data path chip for reconfigur...

Tagged prefetch and instruction decoder for variable length instruc...

Integrated processor and programmable data path chip for reconfigur...

Method for compiling high level programming languages into an integ...

Preprogramming testing in a field programmable gate array

Area and time efficient extraction circuit

Method and apparatus for fault testing a pipelined processor

Programmable input/output buffer circuit with test capability

Input-output circuit for increasing immunity to voltage spikes

Circuit for designating instruction pointers for use by a processor...

Preprogramming testing in a field programmable gate array

Non-arithmetical circular buffer cell availability status indicator...

Circuit for generating a demand-based gated clock

Partitioned decode circuit for low power operation

Multiplexer with level shift capabilities

Preprogramming testing in a field programmable gate array

Programmable input/output buffer circuit with test capability

Patents Applicationslast 30 patents

Fault Tolerant Integrated Circuit Architecture

Resilient Integrated Circuit Architecture

Fault Tolerant Integrated Circuit Architecture

Hierarchical storage architecture for reconfigurable logic configur...

Efficient high performance data operation element for use in a reco...

METHOD FOR COMPILING HIGH LEVEL PROGRAMMING LANGUAGES