Chuen-Jye LIN

Person

Tai-chung County, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Low fabrication cost, high performance, high reliability chip scale...
- Patent number 9,369,175
- Issue date Jun 14, 2016
- QUALCOMM Incorporated
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reliable metal bumps on top of I/O pads after removal of test probe...
- Patent number 8,901,733
- Issue date Dec 2, 2014
- QUALCOMM Incorporated
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method of package structure with simplified encapsulati...
- Patent number 8,685,834
- Issue date Apr 1, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Pei-Haw Tsao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low fabrication cost, high performance, high reliability chip scale...
- Patent number 8,481,418
- Issue date Jul 9, 2013
- Megica Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low fabrication cost, high performance, high reliability chip scale...
- Patent number 8,178,967
- Issue date May 15, 2012
- Megica Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Structure and manufacturing method of a chip scale package
- Patent number 8,158,508
- Issue date Apr 17, 2012
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and manufacturing method of a chip scale package with low...
- Patent number 7,902,679
- Issue date Mar 8, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure and fabrication method thereof
- Patent number 7,638,887
- Issue date Dec 29, 2009
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Pei-Haw Tsao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable metal bumps on top of I/O pads after removal of test probe...
- Patent number 7,465,653
- Issue date Dec 16, 2008
- Megica Corporation
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low fabrication cost, high performance, high reliability chip scale...
- Patent number 7,355,288
- Issue date Apr 8, 2008
- Megica Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low fabrication cost, high performance, high reliability chip scale...
- Patent number 7,338,890
- Issue date Mar 4, 2008
- Megica Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Substrate design to improve chip package reliability
- Patent number 7,105,920
- Issue date Sep 12, 2006
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Yuan Su
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low fabrication cost, high performance, high reliability chip scale...
- Patent number 6,917,119
- Issue date Jul 12, 2005
- Megic Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reliable metal bumps on top of I/O pads after removal of test probe...
- Patent number 6,815,324
- Issue date Nov 9, 2004
- Megic Corporation
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a low fabrication cost, high performance, high rel...
- Patent number 6,642,136
- Issue date Nov 4, 2003
- Megic Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Modified lead finger for wire bonding
- Patent number 6,075,281
- Issue date Jun 13, 2000
- Vanguard International Semiconductor Corporation
- Kuang-Ho Liao
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Reliable metal bumps on top of I/O pads after removal of test probe...
- Publication number 20110291259
- Publication date Dec 1, 2011
- MEGICA CORPORATION
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE WITH LOW...
- Publication number 20110024905
- Publication date Feb 3, 2011
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE WITH LOW...
- Publication number 20110024902
- Publication date Feb 3, 2011
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package structure and fabrication method thereof
- Publication number 20100068846
- Publication date Mar 18, 2010
- Pei-Haw Tsao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...
- Publication number 20100038803
- Publication date Feb 18, 2010
- MEGICA CORPORATION
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Structure and manufacturing method of a chip scale package with low...
- Publication number 20090267213
- Publication date Oct 29, 2009
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...
- Publication number 20090137110
- Publication date May 28, 2009
- MEGICA CORPORATION
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reliable metal bumps on top of I/O pads after removal of test probe...
- Publication number 20080284016
- Publication date Nov 20, 2008
- MEGICA CORPORATION
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...
- Publication number 20080113504
- Publication date May 15, 2008
- MEGICA CORPORATION
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...
- Publication number 20080111236
- Publication date May 15, 2008
- MEGICA CORPORATION
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...
- Publication number 20080113503
- Publication date May 15, 2008
- MEGICA CORPORATION
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...
- Publication number 20080099928
- Publication date May 1, 2008
- MEGICA CORPORATION
- Jin-Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Structure and manufacturing method of a chip scale package
- Publication number 20080088019
- Publication date Apr 17, 2008
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and manufacturing method of a chip scale package
- Publication number 20080067677
- Publication date Mar 20, 2008
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package structure and fabrication method thereof
- Publication number 20060163714
- Publication date Jul 27, 2006
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Pei-Haw Tsao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and manufacturing method of a chip scale package
- Publication number 20060163729
- Publication date Jul 27, 2006
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate design to improve chip package reliability
- Publication number 20060103006
- Publication date May 18, 2006
- Chao-Yuan Su
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
IC PACKAGE HAVING GROUND IC CHIP AND METHOD OF MANUFACTURING SAME
- Publication number 20060060980
- Publication date Mar 23, 2006
- Taiwan Semiconductor Manufacturing Company, Ltd.
- PEI-HAW TSAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low fabrication cost, high performance, high reliability chip scale...
- Publication number 20050215043
- Publication date Sep 29, 2005
- MEGIC Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Low fabrication cost, high performance, high reliability chip scale...
- Publication number 20050189650
- Publication date Sep 1, 2005
- MEGIC Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reliable metal bumps on top of I/O pads after removal of test probe...
- Publication number 20050070085
- Publication date Mar 31, 2005
- MEGIC Corporation
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low fabrication cost, high performance, high reliability chip scale...
- Publication number 20040032024
- Publication date Feb 19, 2004
- MEGIC Corporation
- Jin Yuan Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Process of rectifying a wafer thickness
- Publication number 20030099907
- Publication date May 29, 2003
- Ming-Ta Tei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reliable metal bumps on top of I/O pads after removal of test probe...
- Publication number 20020111009
- Publication date Aug 15, 2002
- MEGIC Corporation
- Ching-Cheng Huang
- H01 - BASIC ELECTRIC ELEMENTS

Chuen-Jye LIN

Person

Patents Grantslast 30 patents

Low fabrication cost, high performance, high reliability chip scale...

Reliable metal bumps on top of I/O pads after removal of test probe...

Fabrication method of package structure with simplified encapsulati...

Low fabrication cost, high performance, high reliability chip scale...

Low fabrication cost, high performance, high reliability chip scale...

Structure and manufacturing method of a chip scale package

Structure and manufacturing method of a chip scale package with low...

Package structure and fabrication method thereof

Reliable metal bumps on top of I/O pads after removal of test probe...

Low fabrication cost, high performance, high reliability chip scale...

Low fabrication cost, high performance, high reliability chip scale...

Substrate design to improve chip package reliability

Low fabrication cost, high performance, high reliability chip scale...

Reliable metal bumps on top of I/O pads after removal of test probe...

Method of making a low fabrication cost, high performance, high rel...

Modified lead finger for wire bonding

Patents Applicationslast 30 patents

Reliable metal bumps on top of I/O pads after removal of test probe...

STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE WITH LOW...

STRUCTURE AND MANUFACTURING METHOD OF A CHIP SCALE PACKAGE WITH LOW...

Package structure and fabrication method thereof

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...

Structure and manufacturing method of a chip scale package with low...

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...

Reliable metal bumps on top of I/O pads after removal of test probe...

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE...

Structure and manufacturing method of a chip scale package

Structure and manufacturing method of a chip scale package

Package structure and fabrication method thereof

Structure and manufacturing method of a chip scale package

Substrate design to improve chip package reliability

IC PACKAGE HAVING GROUND IC CHIP AND METHOD OF MANUFACTURING SAME

Low fabrication cost, high performance, high reliability chip scale...

Low fabrication cost, high performance, high reliability chip scale...

Reliable metal bumps on top of I/O pads after removal of test probe...

Low fabrication cost, high performance, high reliability chip scale...

Process of rectifying a wafer thickness

Reliable metal bumps on top of I/O pads after removal of test probe...