Ciby THURUTHIYIL

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for selectively modeling narrow-width stacked device perform...
- Patent number 8,863,057
- Issue date Oct 14, 2014
- GLOBALFOUNDRIES Inc.
- Kaveri Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for simulating gate capacitance of a tucked tr...
- Patent number 8,818,785
- Issue date Aug 26, 2014
- GLOBALFOUNDRIES Inc.
- Jung-Suk Goo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test structure for determining gate-to-body tunneling current in a...
- Patent number 8,309,951
- Issue date Nov 13, 2012
- GLOBALFOUNDRIES Inc.
- Sushant S. Suryagandh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for robust statistical semiconductor device modeling
- Patent number 8,275,596
- Issue date Sep 25, 2012
- GLOBALFOUNDRIES Inc.
- Vineet Wason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and test system for determining gate-to-body current in a fl...
- Patent number 8,064,832
- Issue date Nov 22, 2011
- Advanced Micro Devices, Inc.
- Sushant S. Suryagandh
- G01 - MEASURING TESTING
Information Patent Grant
Method for quality assured semiconductor device modeling
- Patent number 7,844,927
- Issue date Nov 30, 2010
- GLOBALFOUNDRIES Inc.
- Zhi-Yuan Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitor and control of silicidation using fourier transform infrare...
- Patent number 6,849,469
- Issue date Feb 1, 2005
- Advanced Micro Devices, Inc.
- Ciby Thomas Thuruthiyil
- G01 - MEASURING TESTING
Information Patent Grant
CMOS process with an integrated, high performance, silicide agglome...
- Patent number 6,756,255
- Issue date Jun 29, 2004
- Advanced Micro Devices, Inc.
- Ciby Thuruthiyil
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR SELECTIVELY MODELING NARROW-WIDTH STACKED DEVICE PERFORM...
- Publication number 20140129999
- Publication date May 8, 2014
- GLOBALFOUNDRIES INC.
- Kaveri MATHUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Simulating Gate Capacitance of a Tucked Tr...
- Publication number 20130117001
- Publication date May 9, 2013
- Advanced Micro Devices, Inc.
- Jung-Suk Goo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Simulating Junction Capacitance of a Tucke...
- Publication number 20130117002
- Publication date May 9, 2013
- Advanced Micro Devices, Inc.
- Jung-Suk Goo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR TRANSISTOR DEVICE HAVING AN ASYMMETRIC EMBEDDED STRES...
- Publication number 20100207175
- Publication date Aug 19, 2010
- Advanced Micro Devices, Inc.
- Sushant SURYAGANDH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of modeling SRAM cell
- Publication number 20090259453
- Publication date Oct 15, 2009
- Vineet Wason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Test structure for determining gate-to-body tunneling current in a...
- Publication number 20090020754
- Publication date Jan 22, 2009
- Advanced Micro Devices, Inc.
- Sushant S. Suryagandh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and test system for determining gate-to-body current in a fl...
- Publication number 20090021280
- Publication date Jan 22, 2009
- Advanced Micro Devices, Inc.
- Sushant S. Suryagandh
- G01 - MEASURING TESTING
Information Patent Application
ACCUMULATION MODE MOS DEVICES AND METHODS FOR FABRICATING THE SAME
- Publication number 20080272432
- Publication date Nov 6, 2008
- Advanced Micro Devices, Inc.
- Niraj SUBBA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for quality assured semiconductor device modeling
- Publication number 20080177523
- Publication date Jul 24, 2008
- Advanced Micro Devices, Inc.
- Zhi-Yuan Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for robust statistical semiconductor device modeling
- Publication number 20080141189
- Publication date Jun 12, 2008
- Advanced Micro Devices, Inc.
- Vineet Wason
- G06 - COMPUTING CALCULATING COUNTING

Ciby THURUTHIYIL

Person

Patents Grantslast 30 patents

Method for selectively modeling narrow-width stacked device perform...

Method and apparatus for simulating gate capacitance of a tucked tr...

Test structure for determining gate-to-body tunneling current in a...

Method for robust statistical semiconductor device modeling

Method and test system for determining gate-to-body current in a fl...

Method for quality assured semiconductor device modeling

Monitor and control of silicidation using fourier transform infrare...

CMOS process with an integrated, high performance, silicide agglome...

Patents Applicationslast 30 patents

METHOD FOR SELECTIVELY MODELING NARROW-WIDTH STACKED DEVICE PERFORM...

Method and Apparatus for Simulating Gate Capacitance of a Tucked Tr...

Method and Apparatus for Simulating Junction Capacitance of a Tucke...

SEMICONDUCTOR TRANSISTOR DEVICE HAVING AN ASYMMETRIC EMBEDDED STRES...

Method of modeling SRAM cell

Test structure for determining gate-to-body tunneling current in a...

Method and test system for determining gate-to-body current in a fl...

ACCUMULATION MODE MOS DEVICES AND METHODS FOR FABRICATING THE SAME

Method for quality assured semiconductor device modeling

Method for robust statistical semiconductor device modeling