D. Kevin Covey

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
CMOS multiplexor
- Patent number 5,473,554
- Issue date Dec 5, 1995
- National Semiconductor Corporation
- D. Kevin Covey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully static 32 bit alu with two stage carry bypass
- Patent number 5,444,646
- Issue date Aug 22, 1995
- National Semiconductor Corporation
- D. Kevin Covey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signed overflow sticky bits
- Patent number 5,319,588
- Issue date Jun 7, 1994
- National Semiconductor Corporation
- Ralph W. Haines
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CPU with integrated multiply/accumulate unit
- Patent number 5,311,458
- Issue date May 10, 1994
- National Semiconductor Corporation
- Ralph W. Haines
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structured logic design method using figures of merit and a flowcha...
- Patent number 5,258,919
- Issue date Nov 2, 1993
- National Semiconductor Corporation
- Roy K. Yamanouchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout efficient 32-bit shifter/register with 16-bit interface
- Patent number 5,218,564
- Issue date Jun 8, 1993
- National Semiconductor Corporation
- Ralph W. Haines
- G06 - COMPUTING CALCULATING COUNTING