David A. Comisky

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of providing timing information for interrupts
- Patent number 9,715,468
- Issue date Jul 25, 2017
- Texas Instruments Incorporated
- Bradley James Griffis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmission of data bursts on a constant data rate channel
- Patent number 8,934,890
- Issue date Jan 13, 2015
- Texas Instruments Incorporated
- Chunhua Hu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Supervising and sequencing commonly driven power supplies with digi...
- Patent number 7,630,841
- Issue date Dec 8, 2009
- Texas Instruments Incorporated
- David Allan Comisky
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
System and method to mitigate pots ringing interference in DSL
- Patent number 7,050,552
- Issue date May 23, 2006
- Texas Instruments Incorporated
- David A. Comisky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transfer request bus node for transfer controller with hub and ports
- Patent number 7,047,284
- Issue date May 16, 2006
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Active ports in a transfer controller with hub and ports
- Patent number 6,985,982
- Issue date Jan 10, 2006
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write allocation counter for transfer controller with hub and ports
- Patent number 6,954,468
- Issue date Oct 11, 2005
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Request queue manager in transfer controller with hub and ports
- Patent number 6,868,087
- Issue date Mar 15, 2005
- Texas Instruments Incorporated
- Sanjive Agarwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data bus using synchronous fixed latency loop including read addres...
- Patent number 6,801,985
- Issue date Oct 5, 2004
- Texas Instruments Incorporated
- David A. Comisky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuration bus reconfigurable/reprogrammable interface for expan...
- Patent number 6,694,385
- Issue date Feb 17, 2004
- Texas Instruments Incorporated
- Charles Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Effective channel priority processing for transfer controller with...
- Patent number 6,681,270
- Issue date Jan 20, 2004
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmer initiated cache block operations
- Patent number 6,665,767
- Issue date Dec 16, 2003
- Texas Instruments Incorporated
- David A. Comisky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel transfer size calculation and annulment determination in t...
- Patent number 6,658,503
- Issue date Dec 2, 2003
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
External direct memory access processor interface to centralized tr...
- Patent number 6,654,819
- Issue date Nov 25, 2003
- Texas Instruments Incorporated
- David A. Comisky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory controlled by system address properties
- Patent number 6,629,187
- Issue date Sep 30, 2003
- Texas Instruments Incorporated
- Steven D. Krueger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing window elimination in self-modifying direct memory access pr...
- Patent number 6,622,181
- Issue date Sep 16, 2003
- Texas Instruments Incorporated
- David A. Comisky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified memory system architecture including cache and directly add...
- Patent number 6,606,686
- Issue date Aug 12, 2003
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hub interface unit and application unit interfaces for expanded dir...
- Patent number 6,594,713
- Issue date Jul 15, 2003
- Texas Instruments Incorporated
- Charles Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for operating one or more caches in conjunctio...
- Patent number 6,594,711
- Issue date Jul 15, 2003
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
External direct memory access processor implementation that include...
- Patent number 6,574,683
- Issue date Jun 3, 2003
- Texas Instruments Incorporated
- David A. Comisky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multilevel cache system coherence with memory selectively configure...
- Patent number 6,535,958
- Issue date Mar 18, 2003
- Texas Instruments Incorporated
- Charles L. Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified multilevel memory system architecture which supports both c...
- Patent number 6,484,237
- Issue date Nov 19, 2002
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superscalar memory transfer controller in multilevel memory organiz...
- Patent number 6,408,345
- Issue date Jun 18, 2002
- Texas Instruments Incorporated
- Charles L. Fuoco
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATED DRAFTING SYSTEM
- Publication number 20230242225
- Publication date Aug 3, 2023
- David Allan Comisky
- B63 - SHIPS OR OTHER WATERBORNE VESSELS RELATED EQUIPMENT
Information Patent Application
Method of Providing Timing Information for Interrupts
- Publication number 20160124875
- Publication date May 5, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Bradley James Griffis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatus for power monitoring with sequencing and supe...
- Publication number 20080238488
- Publication date Oct 2, 2008
- David Allan Comisky
- G01 - MEASURING TESTING
Information Patent Application
System and method to mitigate pots ringing interference in DSL
- Publication number 20030123645
- Publication date Jul 3, 2003
- David A. Comisky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Active ports in a transfer controller with hub and ports
- Publication number 20020078269
- Publication date Jun 20, 2002
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING

David A. Comisky

Person

Patents Grantslast 30 patents

Method of providing timing information for interrupts

Transmission of data bursts on a constant data rate channel

Supervising and sequencing commonly driven power supplies with digi...

System and method to mitigate pots ringing interference in DSL

Transfer request bus node for transfer controller with hub and ports

Active ports in a transfer controller with hub and ports

Write allocation counter for transfer controller with hub and ports

Request queue manager in transfer controller with hub and ports

Data bus using synchronous fixed latency loop including read addres...

Configuration bus reconfigurable/reprogrammable interface for expan...

Effective channel priority processing for transfer controller with...

Programmer initiated cache block operations

Parallel transfer size calculation and annulment determination in t...

External direct memory access processor interface to centralized tr...

Cache memory controlled by system address properties

Timing window elimination in self-modifying direct memory access pr...

Unified memory system architecture including cache and directly add...

Hub interface unit and application unit interfaces for expanded dir...

Method and apparatus for operating one or more caches in conjunctio...

External direct memory access processor implementation that include...

Multilevel cache system coherence with memory selectively configure...

Unified multilevel memory system architecture which supports both c...

Superscalar memory transfer controller in multilevel memory organiz...

Patents Applicationslast 30 patents

AUTOMATED DRAFTING SYSTEM

Method of Providing Timing Information for Interrupts

Methods and apparatus for power monitoring with sequencing and supe...

System and method to mitigate pots ringing interference in DSL

Active ports in a transfer controller with hub and ports