David Hoyle

Person

Bedford, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method of loading and replication of sub-vector values
- Patent number 11,372,804
- Issue date Jun 28, 2022
- QUALCOMM Incorporated
- Eric Mahurin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage at contiguous memory addresses
- Patent number 10,162,752
- Issue date Dec 25, 2018
- QUALCOMM Incorporated
- Eric Mahurin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast minimum and maximum searching instruction
- Patent number 9,785,434
- Issue date Oct 10, 2017
- QUALCOMM Incorporated
- Erich J. Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector indirect element vertical addressing mode with horizontal pe...
- Patent number 9,639,503
- Issue date May 2, 2017
- QUALCOMM Incorporated
- Ajay Anant Ingle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector indirect element vertical addressing mode with horizontal pe...
- Patent number 9,606,960
- Issue date Mar 28, 2017
- QUALCOMM Incorporated
- Ajay Anant Ingle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Kasumi cipher executable instructions and circuitry
- Patent number 8,693,681
- Issue date Apr 8, 2014
- Texas Instruments Incorporated
- Tod David Wolf
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High accuracy sin-cos wave and frequency generators, and related sy...
- Patent number 8,659,331
- Issue date Feb 25, 2014
- QUALCOMM Incorporated
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for decoding low density parity check codes
- Patent number 8,392,789
- Issue date Mar 5, 2013
- Texas Instruments Incorporated
- Eric Biscondi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Local memories with permutation functionality for digital signal pr...
- Patent number 8,151,031
- Issue date Apr 3, 2012
- Texas Instruments Incorporated
- Eric Biscondi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic interpolation location
- Patent number 7,995,640
- Issue date Aug 9, 2011
- Texas Instruments Incorporated
- Pierre Bertrand
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Register file bypass with optional results storage and separate pre...
- Patent number 7,725,687
- Issue date May 25, 2010
- Texas Instruments Incorporated
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-cluster communication network and heirarchical register files...
- Patent number 7,673,120
- Issue date Mar 2, 2010
- Texas Instruments Incorporated
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction structures and methods
- Patent number 7,458,007
- Issue date Nov 25, 2008
- Texas Instruments Incorporated
- Jagadeesh Sankaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Microprocessor with rounding multiply instructions
- Patent number 7,062,526
- Issue date Jun 13, 2006
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transfer request bus node for transfer controller with hub and ports
- Patent number 7,047,284
- Issue date May 16, 2006
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast fourier transform
- Patent number 6,963,891
- Issue date Nov 8, 2005
- Texas Instruments Incorporated
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with branch-decrement instruction that provides a ta...
- Patent number 6,834,338
- Issue date Dec 21, 2004
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with conditional cross path stall to minimize CPU cy...
- Patent number 6,766,440
- Issue date Jul 20, 2004
- Texas Instruments Incorporated
- Donald E. Steiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-dimensional galois field multiplier
- Patent number 6,760,742
- Issue date Jul 6, 2004
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with instructions for shifting data responsive to a...
- Patent number 6,757,819
- Issue date Jun 29, 2004
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus with indirect register file access
- Patent number 6,754,809
- Issue date Jun 22, 2004
- Texas Instruments Incorporated
- Karl M. Guttag
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with instruction for saturating and packing data
- Patent number 6,748,521
- Issue date Jun 8, 2004
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with instructions for shuffling and dealing data
- Patent number 6,745,319
- Issue date Jun 1, 2004
- Texas Instruments Incorporated
- Keith Balmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction structures and methods
- Patent number 6,735,737
- Issue date May 11, 2004
- Texas Instruments Incorporated
- Jagadeesh Sankaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data processor with flexible multiply unit
- Patent number 6,711,602
- Issue date Mar 23, 2004
- Texas Instruments Incorporated
- Amarjit Singh Bhandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of implementing variabe length delay instructions...
- Patent number 6,691,240
- Issue date Feb 10, 2004
- Texas Instruments Incorporated
- Eric J. Stotzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with non-aligned scaled and unscaled addressing
- Patent number 6,574,724
- Issue date Jun 3, 2003
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with non-aligned memory access
- Patent number 6,539,467
- Issue date Mar 25, 2003
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transfer controller with hub and ports architecture
- Patent number 6,496,740
- Issue date Dec 17, 2002
- Texas Instruments Incorporated
- Iain Robertson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with non-aligned circular addressing
- Patent number 6,453,405
- Issue date Sep 17, 2002
- Texas Instruments Incorporated
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD OF LOADING AND REPLICATION OF SUB-VECTOR VALUES
- Publication number 20190354508
- Publication date Nov 21, 2019
- QUALCOMM Incorporated
- Eric Mahurin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STORAGE AT CONTIGUOUS MEMORY ADDRESSES
- Publication number 20180081803
- Publication date Mar 22, 2018
- QUALCOMM Incorporated
- Eric Mahurin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIECEWISE POLYNOMIAL EVALUATION INSTRUCTION
- Publication number 20180081634
- Publication date Mar 22, 2018
- QUALCOMM Incorporated
- Eric Mahurin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TABLE LOOKUP USING SIMD INSTRUCTIONS
- Publication number 20170046156
- Publication date Feb 16, 2017
- QUALCOMM Incorporated
- Eric Wayne MAHURIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR INDIRECT ELEMENT VERTICAL ADDRESSING MODE WITH HORIZONTAL PE...
- Publication number 20140281372
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Ajay Anant Ingle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CYCLE SLICED VECTORS AND SLOT EXECUTION ON A SHARED DATAPATH
- Publication number 20140281368
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Ajay Anant Ingle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATIONS FOR EFFICIENT FLOATING POINT COMPUTATIONS
- Publication number 20140067894
- Publication date Mar 6, 2014
- QUALCOMM Incorporated
- Erich James Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Accuracy Sin-Cos Wave and Frequency Generators, and Related Sy...
- Publication number 20130181753
- Publication date Jul 18, 2013
- QUALCOMM Incorporated
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fast Minimum and Maximum Searching Instruction
- Publication number 20130080490
- Publication date Mar 28, 2013
- QUALCOMM Incorporated
- Erich J. Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Decoding Low Density Parity Check Codes
- Publication number 20110029756
- Publication date Feb 3, 2011
- Eric Biscondi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW DENSITY PARITY CHECK CODE ROW UPDATE INSTRUCTION
- Publication number 20100169735
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Eric BISCONDI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Kasumi Cipher Executable Instructions and Circuitry
- Publication number 20100142702
- Publication date Jun 10, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Tod David Wolf
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR CODING RELATING TO A FORWARD LOOP
- Publication number 20100002793
- Publication date Jan 7, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Peter R. Dent
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR IMPROVING TRELLIS DECODING
- Publication number 20100005372
- Publication date Jan 7, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Peter R. Dent
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Local Memories with Permutation Functionality for Digital Signal Pr...
- Publication number 20090254718
- Publication date Oct 8, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Eric Biscondi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sign Operation Instructions and Circuitry
- Publication number 20090113174
- Publication date Apr 30, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Tod David Wolf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter-Cluster Communication Network And Heirarchical Register Files...
- Publication number 20090006816
- Publication date Jan 1, 2009
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYMANIC INTERPOLATION LOCATION
- Publication number 20080267260
- Publication date Oct 30, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Pierre BERTRAND
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Vector Predicates for Sub-Word Parallel Operations
- Publication number 20080016320
- Publication date Jan 17, 2008
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register File Bypass With Optional Results Storage and Separate Pre...
- Publication number 20080016327
- Publication date Jan 17, 2008
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Standard Scramble Code Generation Using Galois Field Arithmetic
- Publication number 20070283231
- Publication date Dec 6, 2007
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor having a set of byte intermingling instructions
- Publication number 20050188182
- Publication date Aug 25, 2005
- TEXAS INSTRUMENTS INCORPORATED
- David Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error correction structures and methods
- Publication number 20020002693
- Publication date Jan 3, 2002
- Jagadeesh Sankaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Error correction structures and methods
- Publication number 20010037483
- Publication date Nov 1, 2001
- Jagadeesh Sankaran
- H03 - BASIC ELECTRONIC CIRCUITRY

David Hoyle

Person

Patents Grantslast 30 patents

System and method of loading and replication of sub-vector values

Data storage at contiguous memory addresses

Fast minimum and maximum searching instruction

Vector indirect element vertical addressing mode with horizontal pe...

Vector indirect element vertical addressing mode with horizontal pe...

Kasumi cipher executable instructions and circuitry

High accuracy sin-cos wave and frequency generators, and related sy...

Method and system for decoding low density parity check codes

Local memories with permutation functionality for digital signal pr...

Dynamic interpolation location

Register file bypass with optional results storage and separate pre...

Inter-cluster communication network and heirarchical register files...

Error correction structures and methods

Microprocessor with rounding multiply instructions

Transfer request bus node for transfer controller with hub and ports

Fast fourier transform

Microprocessor with branch-decrement instruction that provides a ta...

Microprocessor with conditional cross path stall to minimize CPU cy...

Multi-dimensional galois field multiplier

Microprocessor with instructions for shifting data responsive to a...

Data processing apparatus with indirect register file access

Microprocessor with instruction for saturating and packing data

Microprocessor with instructions for shuffling and dealing data

Error correction structures and methods

Data processor with flexible multiply unit

System and method of implementing variabe length delay instructions...

Microprocessor with non-aligned scaled and unscaled addressing

Microprocessor with non-aligned memory access

Transfer controller with hub and ports architecture

Microprocessor with non-aligned circular addressing

Patents Applicationslast 30 patents

SYSTEM AND METHOD OF LOADING AND REPLICATION OF SUB-VECTOR VALUES

DATA STORAGE AT CONTIGUOUS MEMORY ADDRESSES

PIECEWISE POLYNOMIAL EVALUATION INSTRUCTION

TABLE LOOKUP USING SIMD INSTRUCTIONS

VECTOR INDIRECT ELEMENT VERTICAL ADDRESSING MODE WITH HORIZONTAL PE...

CYCLE SLICED VECTORS AND SLOT EXECUTION ON A SHARED DATAPATH

OPERATIONS FOR EFFICIENT FLOATING POINT COMPUTATIONS

High Accuracy Sin-Cos Wave and Frequency Generators, and Related Sy...

Fast Minimum and Maximum Searching Instruction

Method and System for Decoding Low Density Parity Check Codes

LOW DENSITY PARITY CHECK CODE ROW UPDATE INSTRUCTION

Kasumi Cipher Executable Instructions and Circuitry

METHOD AND APPARATUS FOR CODING RELATING TO A FORWARD LOOP

METHOD AND APPARATUS FOR IMPROVING TRELLIS DECODING

Local Memories with Permutation Functionality for Digital Signal Pr...

Sign Operation Instructions and Circuitry

Inter-Cluster Communication Network And Heirarchical Register Files...

DYMANIC INTERPOLATION LOCATION

Vector Predicates for Sub-Word Parallel Operations

Register File Bypass With Optional Results Storage and Separate Pre...

Multi-Standard Scramble Code Generation Using Galois Field Arithmetic

Microprocessor having a set of byte intermingling instructions

Error correction structures and methods

Error correction structures and methods