David J. McElroy

Person

Houston, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Nonvolatile memory device having program and/or erase voltage clamp
- Patent number 6,049,483
- Issue date Apr 11, 2000
- Texas Instruments Incorporated
- John F. Schreck
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for fabricating a semiconductor device with laser programabl...
- Patent number 5,641,701
- Issue date Jun 24, 1997
- Texas Instruments Incorporated
- Hideyuki Fukuhara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an EEPROM cell with separate erasing and programmi...
- Patent number 5,523,249
- Issue date Jun 4, 1996
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell array having continuous-strip field-oxide regions
- Patent number 5,469,383
- Issue date Nov 21, 1995
- Texas Instruments Incorporated
- Dave J. McElroy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and circuitry for programming floating-gate memory cell usin...
- Patent number 5,412,603
- Issue date May 2, 1995
- Texas Instruments Incorporated
- John F. Schreck
- G11 - INFORMATION STORAGE
Information Patent Grant
MOSFET cell array
- Patent number 5,365,082
- Issue date Nov 15, 1994
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS memory cell array
- Patent number 5,350,706
- Issue date Sep 27, 1994
- Texas Instruments Incorporated
- Dave J. McElroy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing a self-aligned window at recessed intersection...
- Patent number 5,334,550
- Issue date Aug 2, 1994
- Texas Instruments Incorporated
- David J. McElroy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM array with narrow margin of voltage thresholds after erase
- Patent number 5,313,427
- Issue date May 17, 1994
- Texas Instruments Incorporated
- John F. Schreck
- G11 - INFORMATION STORAGE
Information Patent Grant
Segmented, multiple-decoder memory array and method for programming...
- Patent number 5,313,432
- Issue date May 17, 1994
- Texas Instruments Incorporated
- Sung-Wei Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Skewed reference to improve ones and zeros in EPROM arrays
- Patent number 5,287,315
- Issue date Feb 15, 1994
- Texas Instruments Incorporated
- John F. Schreck
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming of an electrically-erasable, electrically-programmable,...
- Patent number 5,177,705
- Issue date Jan 5, 1993
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of manufacturing an EEPROM with trench-isolated bitlines
- Patent number 5,173,436
- Issue date Dec 22, 1992
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an electrically-erasable, electrically-programmabl...
- Patent number 5,155,055
- Issue date Oct 13, 1992
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with improved capacitive coupling
- Patent number 5,151,760
- Issue date Sep 29, 1992
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cross-point contact-free floating-gate memory array with silicided...
- Patent number 5,110,753
- Issue date May 5, 1992
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an EEPROM with improved capacitive coupling betwee...
- Patent number 5,057,446
- Issue date Oct 15, 1991
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM with trench-isolated bitlines
- Patent number 5,051,795
- Issue date Sep 24, 1991
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic memory array with segmented bit lines
- Patent number RE33694
- Issue date Sep 17, 1991
- Texas Instruments Incorporated
- David J. McElroy
- 365 - Static information storage and retrieval
Information Patent Grant
Bit and block erasing of an electrically erasable and programmable...
- Patent number 5,047,981
- Issue date Sep 10, 1991
- Texas Instruments Incorporated
- Manzur Gill
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point contact-free floating-gate memory array with silicided...
- Patent number 5,025,494
- Issue date Jun 18, 1991
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic RAM cell with trench capacitor and trench transistor
- Patent number 5,014,099
- Issue date May 7, 1991
- Texas Instruments Incorporated
- David J. McElroy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically-erasable, electrically-programmable read-only memory c...
- Patent number 5,008,721
- Issue date Apr 16, 1991
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic memory array with quasi-folded bit lines
- Patent number 4,908,797
- Issue date Mar 13, 1990
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic ram cell with isolated trench capacitors
- Patent number 4,896,293
- Issue date Jan 23, 1990
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
An unerasable eprom cell
- Patent number 4,805,138
- Issue date Feb 14, 1989
- Texas Instruments Incorporated
- David McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory array with quasi-folded bit lines
- Patent number 4,701,885
- Issue date Oct 20, 1987
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
Fuse link for varying chip operating parameters
- Patent number 4,687,951
- Issue date Aug 18, 1987
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory array with segmented bit lines
- Patent number 4,658,377
- Issue date Apr 14, 1987
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier for CMOS semiconductor memory devices having symmet...
- Patent number 4,634,901
- Issue date Jan 6, 1987
- Texas Instruments Incorporated
- David J. McElroy
- G11 - INFORMATION STORAGE

David J. McElroy

Person

Patents Grantslast 30 patents

Nonvolatile memory device having program and/or erase voltage clamp

Method for fabricating a semiconductor device with laser programabl...

Method of making an EEPROM cell with separate erasing and programmi...

Memory cell array having continuous-strip field-oxide regions

Method and circuitry for programming floating-gate memory cell usin...

MOSFET cell array

CMOS memory cell array

Method of producing a self-aligned window at recessed intersection...

EEPROM array with narrow margin of voltage thresholds after erase

Segmented, multiple-decoder memory array and method for programming...

Skewed reference to improve ones and zeros in EPROM arrays

Programming of an electrically-erasable, electrically-programmable,...

Method of manufacturing an EEPROM with trench-isolated bitlines

Method of making an electrically-erasable, electrically-programmabl...

Integrated circuit with improved capacitive coupling

Cross-point contact-free floating-gate memory array with silicided...

Method of making an EEPROM with improved capacitive coupling betwee...

EEPROM with trench-isolated bitlines

Dynamic memory array with segmented bit lines

Bit and block erasing of an electrically erasable and programmable...

Cross-point contact-free floating-gate memory array with silicided...

Dynamic RAM cell with trench capacitor and trench transistor

Electrically-erasable, electrically-programmable read-only memory c...

Dynamic memory array with quasi-folded bit lines

Dynamic ram cell with isolated trench capacitors

An unerasable eprom cell

Dynamic memory array with quasi-folded bit lines

Fuse link for varying chip operating parameters

Dynamic memory array with segmented bit lines

Sense amplifier for CMOS semiconductor memory devices having symmet...