David L. Dickerson

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Isolation region forming methods
- Patent number 6,967,146
- Issue date Nov 22, 2005
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor construction of a trench
- Patent number 6,710,420
- Issue date Mar 23, 2004
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation region forming methods
- Patent number 6,593,206
- Issue date Jul 15, 2003
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation region forming methods
- Patent number 6,406,977
- Issue date Jun 18, 2002
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation region forming methods
- Patent number 6,372,601
- Issue date Apr 16, 2002
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation region forming methods
- Patent number 6,329,267
- Issue date Dec 11, 2001
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation region forming methods
- Patent number 6,238,999
- Issue date May 29, 2001
- Micron Technology
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contact formation for semiconductor devices
- Patent number 6,207,571
- Issue date Mar 27, 2001
- Micron Technology, Inc.
- Werner Juengling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated interconnect studs and method for forming the same
- Patent number 6,103,612
- Issue date Aug 15, 2000
- Micron Technology, Inc.
- Bradley J. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contact formation for semiconductor devices
- Patent number 6,080,672
- Issue date Jun 27, 2000
- Micron Technology, Inc.
- Werner Juengling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing overetch during the formation of a semiconductor...
- Patent number 6,051,501
- Issue date Apr 18, 2000
- Micron Technology, Inc.
- David S. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor processing method of forming field oxide regions on a...
- Patent number 5,629,230
- Issue date May 13, 1997
- Micron Technology, Inc.
- Pierre C. Fazan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
A method of forming semiconductor structures
- Publication number 20060234469
- Publication date Oct 19, 2006
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation region forming methods
- Publication number 20040241957
- Publication date Dec 2, 2004
- Micron Technology, Inc.
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation region forming methods
- Publication number 20030032258
- Publication date Feb 13, 2003
- David L Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation region forming methods
- Publication number 20030022459
- Publication date Jan 30, 2003
- David L Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolating region forming methods
- Publication number 20020089034
- Publication date Jul 11, 2002
- David L Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation region forming methods
- Publication number 20020070422
- Publication date Jun 13, 2002
- David L Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation Region forming methods
- Publication number 20010012676
- Publication date Aug 9, 2001
- David L Dickerson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation region forming methods
- Publication number 20010009798
- Publication date Jul 26, 2001
- David L. Dickerson
- H01 - BASIC ELECTRIC ELEMENTS

David L. Dickerson

Person

Patents Grantslast 30 patents

Isolation region forming methods

Semiconductor construction of a trench

Isolation region forming methods

Isolation region forming methods

Isolation region forming methods

Isolation region forming methods

Isolation region forming methods

Self-aligned contact formation for semiconductor devices

Isolated interconnect studs and method for forming the same

Self-aligned contact formation for semiconductor devices

Method of reducing overetch during the formation of a semiconductor...

Semiconductor processing method of forming field oxide regions on a...

Patents Applicationslast 30 patents

A method of forming semiconductor structures

Isolation region forming methods

Isolation region forming methods

Isolation region forming methods

Isolating region forming methods

Isolation region forming methods

Isolation Region forming methods

Isolation region forming methods