David L. O'Meara

Person

Albany, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for improving planarity using selective atomic...
- Patent number 11,823,910
- Issue date Nov 21, 2023
- Tokyo Electron Limited
- David O'Meara
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
ALD (atomic layer deposition) liner for via profile control and rel...
- Patent number 11,742,241
- Issue date Aug 29, 2023
- Tokyo Electron Limited
- Xinghua Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-atomic layer deposition (ALD) method of forming sidewall passiv...
- Patent number 11,651,967
- Issue date May 16, 2023
- Tokyo Electron Limited
- Shihsheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for critical dimension (CD) trim of an organic pattern used...
- Patent number 11,621,164
- Issue date Apr 4, 2023
- Tokyo Electron Limited
- Katie Lutker-Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for filling recessed features in semiconductor devices with...
- Patent number 11,621,190
- Issue date Apr 4, 2023
- Tokyo Electron Limited
- Kai-Hung Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for globally adjusting spacer critical dimension using photo...
- Patent number 11,567,407
- Issue date Jan 31, 2023
- Tokyo Electron Limited
- Richard Farrell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized etch stop layer
- Patent number 11,532,517
- Issue date Dec 20, 2022
- Tokyo Electron Limited
- Yun Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple patterning processes
- Patent number 11,417,526
- Issue date Aug 16, 2022
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-atomic layer deposition (ALD) method of forming sidewall passiv...
- Patent number 11,195,723
- Issue date Dec 7, 2021
- Tokyo Electron Limited
- Shihsheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ALD (atomic layer deposition) liner for via profile control and rel...
- Patent number 11,164,781
- Issue date Nov 2, 2021
- Tokyo Electron Limited
- Xinghua Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for filling recessed features in semiconductor devices with...
- Patent number 11,024,535
- Issue date Jun 1, 2021
- Tokyo Electron Limited
- Kai-Hung Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deposition process
- Patent number 10,978,307
- Issue date Apr 13, 2021
- Tokyo Electron Limited
- David O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic layer deposition for low-K trench protection during etch
- Patent number 10,964,587
- Issue date Mar 30, 2021
- Tokyo Electron Limited
- Yen-Tien Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective atomic layer deposition (ALD) of protective caps to enhan...
- Patent number 10,770,294
- Issue date Sep 8, 2020
- Tokyo Electron Limited
- David O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing methods to apply stress engineering to self-aligned m...
- Patent number 10,734,228
- Issue date Aug 4, 2020
- Tokyo Electron Limited
- Eric Chih-Fang Liu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Ruthenium metal feature fill for interconnects
- Patent number 10,700,009
- Issue date Jun 30, 2020
- Tokyo Electron Limited
- Kai-Hung Yu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for bottom-up formation of a film in a recessed feature
- Patent number 10,580,650
- Issue date Mar 3, 2020
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for bottom-up deposition of a film in a recessed feature
- Patent number 10,079,151
- Issue date Sep 18, 2018
- Tokyo Electron Limited
- Kandabara N Tapily
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of controlling solid phase diffusion of boron dopants to for...
- Patent number 9,899,224
- Issue date Feb 20, 2018
- Tokyo Electron Limited
- Steven P. Consiglio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for multi-film deposition and etching in a bat...
- Patent number 9,831,099
- Issue date Nov 28, 2017
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Material processing to achieve sub-10nm patterning
- Patent number 9,443,731
- Issue date Sep 13, 2016
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer material modification to improve K-value and etch properties
- Patent number 9,171,736
- Issue date Oct 27, 2015
- Tokyo Electron Limited
- Angelique D. Raley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer pattern for alternate ALD processes
- Patent number 8,809,169
- Issue date Aug 19, 2014
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming conformal metal silicide films
- Patent number 8,785,310
- Issue date Jul 22, 2014
- Tokyo Electron Limited
- Toshio Hasegawa
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Multilayer sidewall spacer for seam protection of a patterned struc...
- Patent number 8,673,725
- Issue date Mar 18, 2014
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual sidewall spacer for seam protection of a patterned structure
- Patent number 8,664,102
- Issue date Mar 4, 2014
- Tokyo Electron Limited
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for monitoring status of system components
- Patent number 8,460,945
- Issue date Jun 11, 2013
- Tokyo Electron Limited
- David L. O'Meara
- G01 - MEASURING TESTING
Information Patent Grant
Method and control system for treating a hafnium-based dielectric p...
- Patent number 7,509,962
- Issue date Mar 31, 2009
- Tokyo Electron Limited
- David L. O'Meara
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method and system for forming an oxynitride layer
- Patent number 7,501,352
- Issue date Mar 10, 2009
- Tokyo Electron, Ltd.
- Masanobu Igeta
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method and processing system for monitoring status of system compon...
- Patent number 7,479,454
- Issue date Jan 20, 2009
- Tokyo Electron Limited
- David L. O'Meara
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF DEPOSITION IN HIGH ASPECT RATIO (HAR) FEATURES
- Publication number 20240420965
- Publication date Dec 19, 2024
- TOKYO ELECTRON LIMITED
- Shihsheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Profile Control for Semiconductor Manufacturing
- Publication number 20240153770
- Publication date May 9, 2024
- TOKYO ELECTRON LIMITED
- Eric Chih-Fang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Double Patterning Method of Patterning a Substrate
- Publication number 20240087892
- Publication date Mar 14, 2024
- TOKYO ELECTRON LIMITED
- Eric Chih-Fang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING PLANARITY USING SELECTIVE ATOMIC...
- Publication number 20240047218
- Publication date Feb 8, 2024
- TOKYO ELECTRON LIMITED
- David O'Meara
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
SACRIFICIAL CAPPING LAYER FOR GATE PROTECTION
- Publication number 20220344169
- Publication date Oct 27, 2022
- TOKYO ELECTRON LIMITED
- Yun HAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Atomic Layer Deposition (ALD) Method of Forming Sidewall Passiv...
- Publication number 20220189781
- Publication date Jun 16, 2022
- TOKYO ELECTRON LIMITED
- Shihsheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH...
- Publication number 20220139776
- Publication date May 5, 2022
- TOKYO ELECTRON LIMITED
- Kai-Hung Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CRITICAL DIMENSION (CD) TRIM OF AN ORGANIC PATTERN USED...
- Publication number 20220076942
- Publication date Mar 10, 2022
- TOKYO ELECTRON LIMITED
- Katie Lutker-Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Systems and Methods for Improving Planarity using Selective Atomic...
- Publication number 20220037162
- Publication date Feb 3, 2022
- TOKYO ELECTRON LIMITED
- David O'Meara
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
ALD (ATOMIC LAYER DEPOSITION) LINER FOR VIA PROFILE CONTROL AND REL...
- Publication number 20220020642
- Publication date Jan 20, 2022
- TOKYO ELECTRON LIMITED
- Xinghua Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH...
- Publication number 20210287936
- Publication date Sep 16, 2021
- TOKYO ELECTRON LIMITED
- Kai-Hung Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED ETCH STOP LAYER
- Publication number 20210242089
- Publication date Aug 5, 2021
- TOKYO ELECTRON LIMITED
- Yun Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple Patterning Processes
- Publication number 20210242020
- Publication date Aug 5, 2021
- TOKYO ELECTRON LIMITED
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEPOSITION PROCESS
- Publication number 20210057226
- Publication date Feb 25, 2021
- TOKYO ELECTRON LIMITED
- David O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH...
- Publication number 20200118871
- Publication date Apr 16, 2020
- TOKYO ELECTRON LIMITED
- Kai-Hung Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR GLOBALLY ADJUSTING SPACER CRITICAL DIMENSION USING PHOTO...
- Publication number 20200103755
- Publication date Apr 2, 2020
- TOKYO ELECTRON LIMITED
- Richard FARRELL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ALD (ATOMIC LAYER DEPOSITION) LINER FOR VIA PROFILE CONTROL AND REL...
- Publication number 20200051859
- Publication date Feb 13, 2020
- TOKYO ELECTRON LIMITED
- Xinghua Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE ATOMIC LAYER DEPOSITION (ALD) OF PROTECTIVE CAPS TO ENHAN...
- Publication number 20190393035
- Publication date Dec 26, 2019
- TOKYO ELECTRON LIMITED
- David O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Atomic Layer Deposition For Low-K Trench Protection During Etch
- Publication number 20190355617
- Publication date Nov 21, 2019
- TOKYO ELECTRON LIMITED
- David O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHODS TO APPLY STRESS ENGINEERING TO SELF-ALIGNED M...
- Publication number 20190189445
- Publication date Jun 20, 2019
- TOKYO ELECTRON LIMITED
- Eric Chih-Fang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RUTHENIUM METAL FEATURE FILL FOR INTERCONNECTS
- Publication number 20190103363
- Publication date Apr 4, 2019
- TOKYO ELECTRON LIMITED
- Kai-Hung Yu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHOD FOR BOTTOM-UP FORMATION OF A FILM IN A RECESSED FEATURE
- Publication number 20170294312
- Publication date Oct 12, 2017
- TOKYO ELECTRON LIMITED
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR MULTI-FILM DEPOSITION AND ETCHING IN A BAT...
- Publication number 20170236719
- Publication date Aug 17, 2017
- TOKYO ELECTRON LIMITED
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR BOTTOM-UP DEPOSITION OF A FILM IN A RECESSED FEATURE
- Publication number 20170092508
- Publication date Mar 30, 2017
- TOKYO ELECTRON LIMITED
- Kandabara N. Tapily
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF CONTROLLING SOLID PHASE DIFFUSION OF BORON DOPANTS TO FOR...
- Publication number 20160260611
- Publication date Sep 8, 2016
- TOKYO ELECTRON LIMITED
- Steven P. Consiglio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MATERIAL PROCESSING TO ACHIEVE SUB-10NM PATTERNING
- Publication number 20160247680
- Publication date Aug 25, 2016
- TOKYO ELECTRON LIMITED
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GERMANIUM-CONTAINING SEMICONDUCTOR DEVICE AND METHOD OF FORMING
- Publication number 20150340228
- Publication date Nov 26, 2015
- TOKYO ELECTRON LIMITED
- Kandabara N. Tapily
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER MATERIAL MODIFICATION TO IMPROVE K-VALUE AND ETCH PROPERTIES
- Publication number 20150249017
- Publication date Sep 3, 2015
- TOKYO ELECTRON LIMITED
- Angelique D. Raley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING CONFORMAL METAL SILICIDE FILMS
- Publication number 20130196505
- Publication date Aug 1, 2013
- TOKYO ELECTRON LIMITED
- Toshio Hasegawa
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
MULTI-LAYER PATTERN FOR ALTERNATE ALD PROCESSES
- Publication number 20130084688
- Publication date Apr 4, 2013
- TOKYO ELECTRON LIMITED
- David L. O'Meara
- H01 - BASIC ELECTRIC ELEMENTS

David L. O'Meara

Person

Patents Grantslast 30 patents

Systems and methods for improving planarity using selective atomic...

ALD (atomic layer deposition) liner for via profile control and rel...

Non-atomic layer deposition (ALD) method of forming sidewall passiv...

Method for critical dimension (CD) trim of an organic pattern used...

Method for filling recessed features in semiconductor devices with...

Method for globally adjusting spacer critical dimension using photo...

Localized etch stop layer

Multiple patterning processes

Non-atomic layer deposition (ALD) method of forming sidewall passiv...

ALD (atomic layer deposition) liner for via profile control and rel...

Method for filling recessed features in semiconductor devices with...

Deposition process

Atomic layer deposition for low-K trench protection during etch

Selective atomic layer deposition (ALD) of protective caps to enhan...

Manufacturing methods to apply stress engineering to self-aligned m...

Ruthenium metal feature fill for interconnects

Method for bottom-up formation of a film in a recessed feature

Method for bottom-up deposition of a film in a recessed feature

Method of controlling solid phase diffusion of boron dopants to for...

Method and apparatus for multi-film deposition and etching in a bat...

Material processing to achieve sub-10nm patterning

Spacer material modification to improve K-value and etch properties

Multi-layer pattern for alternate ALD processes

Method of forming conformal metal silicide films

Multilayer sidewall spacer for seam protection of a patterned struc...

Dual sidewall spacer for seam protection of a patterned structure

Method for monitoring status of system components

Method and control system for treating a hafnium-based dielectric p...

Method and system for forming an oxynitride layer

Method and processing system for monitoring status of system compon...

Patents Applicationslast 30 patents

METHOD OF DEPOSITION IN HIGH ASPECT RATIO (HAR) FEATURES

Method of Profile Control for Semiconductor Manufacturing

Double Patterning Method of Patterning a Substrate

SYSTEMS AND METHODS FOR IMPROVING PLANARITY USING SELECTIVE ATOMIC...

SACRIFICIAL CAPPING LAYER FOR GATE PROTECTION

Non-Atomic Layer Deposition (ALD) Method of Forming Sidewall Passiv...

METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH...

METHOD FOR CRITICAL DIMENSION (CD) TRIM OF AN ORGANIC PATTERN USED...

Systems and Methods for Improving Planarity using Selective Atomic...

ALD (ATOMIC LAYER DEPOSITION) LINER FOR VIA PROFILE CONTROL AND REL...

METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH...

LOCALIZED ETCH STOP LAYER

Multiple Patterning Processes

DEPOSITION PROCESS

METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH...

METHOD FOR GLOBALLY ADJUSTING SPACER CRITICAL DIMENSION USING PHOTO...

ALD (ATOMIC LAYER DEPOSITION) LINER FOR VIA PROFILE CONTROL AND REL...

SELECTIVE ATOMIC LAYER DEPOSITION (ALD) OF PROTECTIVE CAPS TO ENHAN...

Atomic Layer Deposition For Low-K Trench Protection During Etch

MANUFACTURING METHODS TO APPLY STRESS ENGINEERING TO SELF-ALIGNED M...

RUTHENIUM METAL FEATURE FILL FOR INTERCONNECTS

METHOD FOR BOTTOM-UP FORMATION OF A FILM IN A RECESSED FEATURE

METHOD AND APPARATUS FOR MULTI-FILM DEPOSITION AND ETCHING IN A BAT...

METHOD FOR BOTTOM-UP DEPOSITION OF A FILM IN A RECESSED FEATURE

METHOD OF CONTROLLING SOLID PHASE DIFFUSION OF BORON DOPANTS TO FOR...

MATERIAL PROCESSING TO ACHIEVE SUB-10NM PATTERNING

GERMANIUM-CONTAINING SEMICONDUCTOR DEVICE AND METHOD OF FORMING

SPACER MATERIAL MODIFICATION TO IMPROVE K-VALUE AND ETCH PROPERTIES

METHOD OF FORMING CONFORMAL METAL SILICIDE FILMS

MULTI-LAYER PATTERN FOR ALTERNATE ALD PROCESSES