Debra Bernstein

Person

Sudbury, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for processor queue management
- Patent number 11,134,021
- Issue date Sep 28, 2021
- Intel Corporation
- Jonathan Kenny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,929,323
- Issue date Feb 23, 2021
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit check processors, methods, systems, and instructions to check a...
- Patent number 10,761,979
- Issue date Sep 1, 2020
- Intel Corporation
- Hugh Wilkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,445,271
- Issue date Oct 15, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for a distributed hardware queue manager
- Patent number 10,216,668
- Issue date Feb 26, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory mapping in a processor having multiple programmable units
- Patent number 9,830,285
- Issue date Nov 28, 2017
- Intel Corporation
- Gilbert Wolrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory mapping in a processor having multiple programmable units
- Patent number 9,830,284
- Issue date Nov 28, 2017
- Intel Corporation
- Gilbert Wolrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory mapping in a processor having multiple programmable units
- Patent number 9,824,038
- Issue date Nov 21, 2017
- Intel Corporation
- Gilbert Wolrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory mapping in a processor having multiple programmable units
- Patent number 9,824,037
- Issue date Nov 21, 2017
- Intel Corporation
- Gilbert Wolrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Arbitrating memory accesses via a shared memory fabric
- Patent number 9,535,860
- Issue date Jan 3, 2017
- Intel Corporation
- Daniel F. Cutter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory mapping in a processor having multiple programmable units
- Patent number 9,128,818
- Issue date Sep 8, 2015
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory mapping in a processor having multiple programmable units
- Patent number 8,738,886
- Issue date May 27, 2014
- Intel Corporation
- Gilbert Wolrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Queue arrays in network devices
- Patent number 8,380,923
- Issue date Feb 19, 2013
- Intel Corporation
- Gilbert Wolrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Register set used in multithreaded parallel processor architecture
- Patent number 7,991,983
- Issue date Aug 2, 2011
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Queue arrays in network devices
- Patent number 7,895,239
- Issue date Feb 22, 2011
- Intel Corporation
- Gilbert Wolrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Parallel multi-threaded processing
- Patent number RE41849
- Issue date Oct 19, 2010
- Intel Corporation
- Gilbert Wolrich
- 710 - Electrical computers and digital data processing systems: input/output
Information Patent Grant
Method and apparatus for gigabit packet assignment for multithreade...
- Patent number 7,751,402
- Issue date Jul 6, 2010
- Intel Corporation
- Gilbert Wolrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Providing real-time control data for a network processor
- Patent number 7,620,702
- Issue date Nov 17, 2009
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer mechanism using unidirectional pull bus and push bus
- Patent number 7,610,451
- Issue date Oct 27, 2009
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register set used in multithreaded parallel processor architecture
- Patent number 7,546,444
- Issue date Jun 9, 2009
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded microprocessor with register allocation based on numb...
- Patent number 7,487,505
- Issue date Feb 3, 2009
- Intel Corporation
- Mark B. Rosenbluth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having content addressable memory for block-based queue s...
- Patent number 7,467,256
- Issue date Dec 16, 2008
- Intel Corporation
- Sanjeev Jain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phasing for a multi-threaded network processor
- Patent number 7,441,245
- Issue date Oct 21, 2008
- Intel Corporation
- Donald F. Hooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Registers for data transfers
- Patent number 7,437,724
- Issue date Oct 14, 2008
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch instruction for processor with branching dependent on a spec...
- Patent number 7,421,572
- Issue date Sep 2, 2008
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having content addressable memory with command ordering
- Patent number 7,418,543
- Issue date Aug 26, 2008
- Intel Corporation
- Sanjeev Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller with command queue look-ahead
- Patent number 7,418,540
- Issue date Aug 26, 2008
- Intel Corporation
- Natarajan Rohit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal aggregation
- Patent number 7,376,950
- Issue date May 20, 2008
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enqueueing entries in a packet queue referencing packets
- Patent number 7,366,865
- Issue date Apr 29, 2008
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Free list and ring data structure management
- Patent number 7,337,275
- Issue date Feb 26, 2008
- Intel Corporation
- Gilbert Wolrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
ACCELERATOR FABRIC FOR DISCRETE GRAPHICS
- Publication number 20220113967
- Publication date Apr 14, 2022
- Intel Corporation
- Abhishek Reddy Pamu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY THIN PROVISIONING USING MEMORY POOLS
- Publication number 20210200667
- Publication date Jul 1, 2021
- Intel Corporation
- Debra BERNSTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFRASTRUCTURE PROCESSING UNIT
- Publication number 20210117242
- Publication date Apr 22, 2021
- Intel Corporation
- Johan VAN DE GROENENDAAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFRASTRUCTURE PROCESSING UNIT
- Publication number 20210117249
- Publication date Apr 22, 2021
- Intel Corporation
- Kshitij A. DOSHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20200042479
- Publication date Feb 6, 2020
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR MOVING WORKLOADS BETWEEN HARDWARE QUEUE MANAGERS
- Publication number 20190042305
- Publication date Feb 7, 2019
- Intel Corporation
- Niall D. McDonnell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR PROCESSOR QUEUE MANAGEMENT
- Publication number 20180191630
- Publication date Jul 5, 2018
- Intel Corporation
- JONATHAN KENNY
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BIT CHECK PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO CHECK A...
- Publication number 20180004655
- Publication date Jan 4, 2018
- Intel Corporation
- Hugh Wilkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER
- Publication number 20170286337
- Publication date Oct 5, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20170192921
- Publication date Jul 6, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS
- Publication number 20160071558
- Publication date Mar 10, 2016
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS
- Publication number 20160070664
- Publication date Mar 10, 2016
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS
- Publication number 20160034420
- Publication date Feb 4, 2016
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS
- Publication number 20160019178
- Publication date Jan 21, 2016
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS
- Publication number 20150081999
- Publication date Mar 19, 2015
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arbitrating Memory Accesses Via A Shared Memory Fabric
- Publication number 20140201471
- Publication date Jul 17, 2014
- Daniel F. Cutter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUEUE ARRAYS IN NETWORK DEVICES
- Publication number 20110113197
- Publication date May 12, 2011
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER SET USED IN MULTITHREADED PARALLEL PROCESSOR ARCHITECTURE
- Publication number 20090307469
- Publication date Dec 10, 2009
- Intel Corporation
- Gilbert Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTITHREADED MICROPROCESSOR WITH REGISTER ALLOCATION BASED ON NUMB...
- Publication number 20090182989
- Publication date Jul 16, 2009
- Intel Corporation
- Mark B. Rosenbluth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTERS FOR DATA TRANSFERS
- Publication number 20090119671
- Publication date May 7, 2009
- Intel Corporation
- GILBERT WOLRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for packet queuing
- Publication number 20060140203
- Publication date Jun 29, 2006
- Sanjeev Jain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Processor having content addressable memory for block-based queue s...
- Publication number 20060143373
- Publication date Jun 29, 2006
- Sanjeev Jain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus to support multiple memory banks with a memory...
- Publication number 20060136681
- Publication date Jun 22, 2006
- Sanjeev Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor having content addressable memory with command ordering
- Publication number 20060136659
- Publication date Jun 22, 2006
- Sanjeev Jain
- G11 - INFORMATION STORAGE
Information Patent Application
Enqueueing entries in a packet queue referencing packets
- Publication number 20060069869
- Publication date Mar 30, 2006
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory controller with command queue look-ahead
- Publication number 20050246481
- Publication date Nov 3, 2005
- Natarajan Rohit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel processor with functional pipeline providing programming e...
- Publication number 20050216710
- Publication date Sep 29, 2005
- Hugh M. Wilkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for meeting a given content throughput using a...
- Publication number 20050198361
- Publication date Sep 8, 2005
- Prashant R. Chandra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scratchpad memory
- Publication number 20050149665
- Publication date Jul 7, 2005
- Intel Corporation, a Delaware corporation
- Gilbert Wolrich
- G11 - INFORMATION STORAGE
Information Patent Application
Software controlled content addressable memory in a general purpose...
- Publication number 20050132132
- Publication date Jun 16, 2005
- Mark B. Rosenbluth
- G06 - COMPUTING CALCULATING COUNTING

Debra Bernstein

Person

Patents Grantslast 30 patents

Techniques for processor queue management

Multi-core communication acceleration using hardware queue device

Bit check processors, methods, systems, and instructions to check a...

Multi-core communication acceleration using hardware queue device

Technologies for a distributed hardware queue manager

Memory mapping in a processor having multiple programmable units

Memory mapping in a processor having multiple programmable units

Memory mapping in a processor having multiple programmable units

Memory mapping in a processor having multiple programmable units

Arbitrating memory accesses via a shared memory fabric

Memory mapping in a processor having multiple programmable units

Memory mapping in a processor having multiple programmable units

Queue arrays in network devices

Register set used in multithreaded parallel processor architecture

Queue arrays in network devices

Parallel multi-threaded processing

Method and apparatus for gigabit packet assignment for multithreade...

Providing real-time control data for a network processor

Data transfer mechanism using unidirectional pull bus and push bus

Register set used in multithreaded parallel processor architecture

Multithreaded microprocessor with register allocation based on numb...

Processor having content addressable memory for block-based queue s...

Phasing for a multi-threaded network processor

Registers for data transfers

Branch instruction for processor with branching dependent on a spec...

Processor having content addressable memory with command ordering

Memory controller with command queue look-ahead

Signal aggregation

Enqueueing entries in a packet queue referencing packets

Free list and ring data structure management

Patents Applicationslast 30 patents

ACCELERATOR FABRIC FOR DISCRETE GRAPHICS

MEMORY THIN PROVISIONING USING MEMORY POOLS

INFRASTRUCTURE PROCESSING UNIT

INFRASTRUCTURE PROCESSING UNIT

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

TECHNOLOGIES FOR MOVING WORKLOADS BETWEEN HARDWARE QUEUE MANAGERS

TECHNIQUES FOR PROCESSOR QUEUE MANAGEMENT

BIT CHECK PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO CHECK A...

TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS

MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS

MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS

MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS

MEMORY MAPPING IN A PROCESSOR HAVING MULTIPLE PROGRAMMABLE UNITS

Arbitrating Memory Accesses Via A Shared Memory Fabric

QUEUE ARRAYS IN NETWORK DEVICES

REGISTER SET USED IN MULTITHREADED PARALLEL PROCESSOR ARCHITECTURE

MULTITHREADED MICROPROCESSOR WITH REGISTER ALLOCATION BASED ON NUMB...

REGISTERS FOR DATA TRANSFERS

System and method for packet queuing

Processor having content addressable memory for block-based queue s...

Method and apparatus to support multiple memory banks with a memory...

Processor having content addressable memory with command ordering

Enqueueing entries in a packet queue referencing packets

Memory controller with command queue look-ahead

Parallel processor with functional pipeline providing programming e...

Method and apparatus for meeting a given content throughput using a...

Scratchpad memory

Software controlled content addressable memory in a general purpose...