Donald Alpert

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Computer system and method for executing interrupt instructions in...
- Patent number 7,010,671
- Issue date Mar 7, 2006
- Intel Corporation
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Article for providing event handling functionality in a processor s...
- Patent number 6,584,558
- Issue date Jun 24, 2003
- Intel Corporation
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing event handling functionality in...
- Patent number 6,408,386
- Issue date Jun 18, 2002
- Intel Corporation
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system and method for executing interrupt instructions in...
- Patent number 6,385,718
- Issue date May 7, 2002
- Intel Corporation
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation with/bypassing intermediate segmentation transl...
- Patent number 6,219,774
- Issue date Apr 17, 2001
- Intel Corporation
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing breakpoints on a selectable addr...
- Patent number 6,052,801
- Issue date Apr 18, 2000
- Intel Corporation
- Gary N. Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conditional move using a compare instruction generating a condition...
- Patent number 5,991,874
- Issue date Nov 23, 1999
- Intel Corporation
- Jack D. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for identifying the features and the origin of...
- Patent number 5,958,037
- Issue date Sep 28, 1999
- Intel Corporation
- Robert S. Dreyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical address size selection and page size selection in an addre...
- Patent number 5,802,605
- Issue date Sep 1, 1998
- Intel Corporation
- Donald B. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method using an ID instruction to identify a computer...
- Patent number 5,790,834
- Issue date Aug 4, 1998
- Intel Corporation
- Robert S. Dreyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing two system architectures in a pr...
- Patent number 5,774,686
- Issue date Jun 30, 1998
- Intel Corporation
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive 128-bit floating point load and store instructions for qua...
- Patent number 5,764,959
- Issue date Jun 9, 1998
- Intel Corporation
- Harshvardhan Sharangpani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing address breakpoints, branch brea...
- Patent number 5,740,413
- Issue date Apr 14, 1998
- Intel Corporation
- Donald Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive 128-bit floating point load and store operations for quadr...
- Patent number 5,729,724
- Issue date Mar 17, 1998
- Intel Corporation
- Harshvardhan Sharangpani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for verifying the correct processing of pipelined instructio...
- Patent number 5,692,167
- Issue date Nov 25, 1997
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for identifying a computer microprocessor
- Patent number 5,675,825
- Issue date Oct 7, 1997
- Intel Corporation
- Robert S. Dreyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for software to identify features implemented in a processor
- Patent number 5,671,435
- Issue date Sep 23, 1997
- Intel Corporation
- Donald Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially decoded instruction cache
- Patent number 5,669,011
- Issue date Sep 16, 1997
- National Semiconductor Corporation
- Donald B. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing breakpoints on taken jumps and f...
- Patent number 5,659,679
- Issue date Aug 19, 1997
- Intel Corporation
- Donald Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for monitoring the performance of a microprocessor
- Patent number 5,657,253
- Issue date Aug 12, 1997
- Intel Corporation
- Robert S. Dreyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor capable of executing programs that contain RISC and CISC...
- Patent number 5,638,525
- Issue date Jun 10, 1997
- Intel Corporation
- Gary N. Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing efficient software debugging
- Patent number 5,621,886
- Issue date Apr 15, 1997
- Intel Corporation
- Donald Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical address size selection and page size selection in an addre...
- Patent number 5,617,554
- Issue date Apr 1, 1997
- Intel Corporation
- Donald B. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch prediction and resolution apparatus for a superscalar comput...
- Patent number 5,606,676
- Issue date Feb 25, 1997
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaved cache for multiple accesses per clock cycle in a microp...
- Patent number 5,559,986
- Issue date Sep 24, 1996
- Intel Corporation
- Donald B. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for storing partially-decoded instructions in...
- Patent number 5,481,751
- Issue date Jan 2, 1996
- National Semiconductor Corporation
- Donald B. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with an external command mode for diagnosis and debu...
- Patent number 5,479,652
- Issue date Dec 26, 1995
- Intel Corporation
- Robert S. Dreyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with apparatus for parallel execution of instructions
- Patent number 5,475,824
- Issue date Dec 12, 1995
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch prediction and resolution apparatus for a superscalar comput...
- Patent number 5,442,756
- Issue date Aug 15, 1995
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dependency checking in a multi-pipelined m...
- Patent number 5,416,913
- Issue date May 16, 1995
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Computer system and method for executing interrupt instructions in...
- Publication number 20050091480
- Publication date Apr 28, 2005
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer system having software interrupt (INTn) instructions selec...
- Publication number 20020120434
- Publication date Aug 29, 2002
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Article for providing event handling functionality
- Publication number 20020120832
- Publication date Aug 29, 2002
- Intel Corporation
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING

Donald Alpert

Person

Patents Grantslast 30 patents

Computer system and method for executing interrupt instructions in...

Article for providing event handling functionality in a processor s...

Method and apparatus for providing event handling functionality in...

Computer system and method for executing interrupt instructions in...

Address translation with/bypassing intermediate segmentation transl...

Method and apparatus for providing breakpoints on a selectable addr...

Conditional move using a compare instruction generating a condition...

Apparatus and method for identifying the features and the origin of...

Physical address size selection and page size selection in an addre...

Apparatus and method using an ID instruction to identify a computer...

Method and apparatus for providing two system architectures in a pr...

Adaptive 128-bit floating point load and store instructions for qua...

Method and apparatus for providing address breakpoints, branch brea...

Adaptive 128-bit floating point load and store operations for quadr...

Method for verifying the correct processing of pipelined instructio...

Apparatus and method for identifying a computer microprocessor

Technique for software to identify features implemented in a processor

Partially decoded instruction cache

Method and apparatus for providing breakpoints on taken jumps and f...

Apparatus for monitoring the performance of a microprocessor

Processor capable of executing programs that contain RISC and CISC...

Method and apparatus for providing efficient software debugging

Physical address size selection and page size selection in an addre...

Branch prediction and resolution apparatus for a superscalar comput...

Interleaved cache for multiple accesses per clock cycle in a microp...

Apparatus and method for storing partially-decoded instructions in...

Microprocessor with an external command mode for diagnosis and debu...

Microprocessor with apparatus for parallel execution of instructions

Branch prediction and resolution apparatus for a superscalar comput...

Method and apparatus for dependency checking in a multi-pipelined m...

Patents Applicationslast 30 patents

Computer system and method for executing interrupt instructions in...

Computer system having software interrupt (INTn) instructions selec...

Article for providing event handling functionality