Du B. Nguyen

Person

Danbury, CT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming metal interconnect structures in ultra low-k diel...
- Patent number 8,466,056
- Issue date Jun 18, 2013
- International Business Machines Corporation
- Birendra Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure for modeling stress-induced degradation of conductive int...
- Patent number 7,692,439
- Issue date Apr 6, 2010
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Structure for monitoring stress-induced degradation of conductive i...
- Patent number 7,639,032
- Issue date Dec 29, 2009
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Structure and method for monitoring stress-induced degradation of c...
- Patent number 7,397,260
- Issue date Jul 8, 2008
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Process for forming a redundant structure
- Patent number 7,279,411
- Issue date Oct 9, 2007
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge seal for a semiconductor device
- Patent number 7,163,883
- Issue date Jan 16, 2007
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via barrier layers continuous with metal line barrier layers at not...
- Patent number 7,138,714
- Issue date Nov 21, 2006
- International Business Machines Corporation
- Du B. Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked via-stud with improved reliability in copper metallurgy
- Patent number 6,972,209
- Issue date Dec 6, 2005
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for eliminating time dependent dielectric brea...
- Patent number 6,825,561
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an edge seal for a semiconductor device
- Patent number 6,734,090
- Issue date May 11, 2004
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper interconnections with enhanced electromigration resistance a...
- Patent number 6,348,731
- Issue date Feb 19, 2002
- International Business Machines Corporation
- Leon Ashley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned composite insulator with sub-half-micron multilevel hi...
- Patent number 6,294,835
- Issue date Sep 25, 2001
- International Business Machines Corporation
- Hormazdyar M. Dalal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming copper interconnections with enhanced electromigr...
- Patent number 6,287,954
- Issue date Sep 11, 2001
- International Business Machines Corporation
- Leon Ashley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-quarter-micron copper interconnections with improved electromig...
- Patent number 6,258,710
- Issue date Jul 10, 2001
- International Business Machines Corporation
- Hazara S. Rathore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned composite insulator with sub-half-micron multilevel hi...
- Patent number 6,133,139
- Issue date Oct 17, 2000
- International Business Machines Corporation
- Hormazdyar M. Dalal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming copper interconnections with enhanced electromigr...
- Patent number 6,130,161
- Issue date Oct 10, 2000
- International Business Machines Corporation
- Leon Ashley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-quarter-micron copper interconnections with improved electromig...
- Patent number 6,069,068
- Issue date May 30, 2000
- International Business Machines Corporation
- Hazara S. Rathore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing planar metal-to-metal capacitor for use in inte...
- Patent number 6,069,051
- Issue date May 30, 2000
- International Business Machines Corporation
- Du B. Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for providing electrically fusible links in copper interconn...
- Patent number 6,033,939
- Issue date Mar 7, 2000
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-half-micron multi-level interconnection structure and process t...
- Patent number 5,981,374
- Issue date Nov 9, 1999
- International Business Machines Corporation
- Hormazdyar M. Dalal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High temperature electromigration stress test system, test socket,...
- Patent number 5,760,595
- Issue date Jun 2, 1998
- International Business Machines Corporation
- Robert Daniel Edwards
- G01 - MEASURING TESTING
Information Patent Grant
Start up circuit for continuous sine-wave commutated brushless motors
- Patent number 5,491,391
- Issue date Feb 13, 1996
- International Business Machines Corporation
- Allen A. Bahr
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for producing interlevel stud vias
- Patent number 5,252,516
- Issue date Oct 12, 1993
- International Business Machines Corporation
- Du B. Nguyen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method of Forming Metal Interconnect Structures in Ultra Low-K Diel...
- Publication number 20110117737
- Publication date May 19, 2011
- Birendra Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD OF FORMING METAL INTERCONNECT STRUCTURES IN UL...
- Publication number 20100176513
- Publication date Jul 15, 2010
- International Business Machines Corporation
- Birendra Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure for modeling stress-induced degradation of conductive int...
- Publication number 20080231312
- Publication date Sep 25, 2008
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
Method for monitoring stress-induced degradation of conductive inte...
- Publication number 20080107149
- Publication date May 8, 2008
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
DEVICE HAVING A REDUNDANT STRUCTURE
- Publication number 20070205515
- Publication date Sep 6, 2007
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR MONITORING STRESS-INDUCED DEGRADATION OF C...
- Publication number 20070115018
- Publication date May 24, 2007
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
PROCESS FOR FORMING A REDUNDANT STRUCTURE
- Publication number 20070111497
- Publication date May 17, 2007
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABILITY AND FUNCTIONALITY IMPROVEMENTS ON COPPER INTERCONNECTS...
- Publication number 20060180930
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Du B. Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked via-stud with improved reliability in copper metallurgy
- Publication number 20060014376
- Publication date Jan 19, 2006
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR ELIMINATING TIME DEPENDENT DIELECTRIC BREA...
- Publication number 20040256729
- Publication date Dec 23, 2004
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked via-stud with improved reliability in copper metallurgy
- Publication number 20040101663
- Publication date May 27, 2004
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Edge seal for a semiconductor device
- Publication number 20040087078
- Publication date May 6, 2004
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Edge seal for a semiconductor device
- Publication number 20030157794
- Publication date Aug 21, 2003
- International Business Machines Corporation
- Birendra N. Agarwala
- H01 - BASIC ELECTRIC ELEMENTS

Du B. Nguyen

Person

Patents Grantslast 30 patents

Method of forming metal interconnect structures in ultra low-k diel...

Structure for modeling stress-induced degradation of conductive int...

Structure for monitoring stress-induced degradation of conductive i...

Structure and method for monitoring stress-induced degradation of c...

Process for forming a redundant structure

Edge seal for a semiconductor device

Via barrier layers continuous with metal line barrier layers at not...

Stacked via-stud with improved reliability in copper metallurgy

Structure and method for eliminating time dependent dielectric brea...

Method of making an edge seal for a semiconductor device

Copper interconnections with enhanced electromigration resistance a...

Self-aligned composite insulator with sub-half-micron multilevel hi...

Method of forming copper interconnections with enhanced electromigr...

Sub-quarter-micron copper interconnections with improved electromig...

Self-aligned composite insulator with sub-half-micron multilevel hi...

Method of forming copper interconnections with enhanced electromigr...

Sub-quarter-micron copper interconnections with improved electromig...

Method of producing planar metal-to-metal capacitor for use in inte...

Method for providing electrically fusible links in copper interconn...

Sub-half-micron multi-level interconnection structure and process t...

High temperature electromigration stress test system, test socket,...

Start up circuit for continuous sine-wave commutated brushless motors

Method for producing interlevel stud vias

Patents Applicationslast 30 patents

Method of Forming Metal Interconnect Structures in Ultra Low-K Diel...

STRUCTURE AND METHOD OF FORMING METAL INTERCONNECT STRUCTURES IN UL...

Structure for modeling stress-induced degradation of conductive int...

Method for monitoring stress-induced degradation of conductive inte...

DEVICE HAVING A REDUNDANT STRUCTURE

STRUCTURE AND METHOD FOR MONITORING STRESS-INDUCED DEGRADATION OF C...

PROCESS FOR FORMING A REDUNDANT STRUCTURE

RELIABILITY AND FUNCTIONALITY IMPROVEMENTS ON COPPER INTERCONNECTS...

Stacked via-stud with improved reliability in copper metallurgy

STRUCTURE AND METHOD FOR ELIMINATING TIME DEPENDENT DIELECTRIC BREA...

Stacked via-stud with improved reliability in copper metallurgy

Edge seal for a semiconductor device

Edge seal for a semiconductor device