Duane E. Galbi

Person

Cambridge, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory hub providing cache coherency protocol system method for mul...
- Patent number 12,111,775
- Issue date Oct 8, 2024
- Intel Corporation
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory striping approach that interleaves sub protected data words
- Patent number 12,099,408
- Issue date Sep 24, 2024
- Intel Corporation
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous dynamic random access memory (SDRAM) dual in-line memor...
- Patent number 11,699,471
- Issue date Jul 11, 2023
- Intel Corporation
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for flexible protocol acceleration
- Patent number 10,884,968
- Issue date Jan 5, 2021
- Intel Corporation
- Matthew J. Adiletta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for flexible I/O endpoint acceleration
- Patent number 10,783,100
- Issue date Sep 22, 2020
- Intel Corporation
- Matthew J. Adiletta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses for register file with novel bit cell implementation
- Patent number 8,331,133
- Issue date Dec 11, 2012
- Intel Corporation
- Duane E. Galbi
- G11 - INFORMATION STORAGE
Information Patent Grant
Regulating application of clock to control current rush (DI/DT)
- Patent number 7,533,286
- Issue date May 12, 2009
- Intel Corporation
- Praveen Mosur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC coding for high speed implementation
- Patent number 7,447,948
- Issue date Nov 4, 2008
- Intel Corporation
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for automatic resource reservation and communication that fa...
- Patent number 7,099,328
- Issue date Aug 29, 2006
- Mindspeed Technologies, Inc.
- Duane E. Galbi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Enhancing performance by pre-fetching and caching data directly in...
- Patent number 6,822,959
- Issue date Nov 23, 2004
- Mindspeed Technologies, Inc.
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing two pass quality video compress...
- Patent number 6,760,478
- Issue date Jul 6, 2004
- Hewlett-Packard Development Company, L.P.
- Matthew James Adiletta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuitry for reading from and writing to memory cells
- Patent number 6,366,502
- Issue date Apr 2, 2002
- STMicroelectronics Limited
- Steven Charles Docker
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for performing two pass quality video compress...
- Patent number 6,101,276
- Issue date Aug 8, 2000
- Compaq Computer Corporation
- Matthew James Adiletta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for performing switched supply drive in CMOS p...
- Patent number 5,847,575
- Issue date Dec 8, 1998
- Digital Equipment Corporation
- Duane Galbi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast check bit write for a semiconductor memory
- Patent number 5,638,385
- Issue date Jun 10, 1997
- International Business Machines Corporation
- John A. Fifield
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS processing with low and high-current FETs
- Patent number 5,547,894
- Issue date Aug 20, 1996
- International Business Machines Corporation
- Jack A. Mandelman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clocking circuit with increasing delay as supply voltage VDD
- Patent number 5,532,969
- Issue date Jul 2, 1996
- International Business Machines Corporation
- Russell J. Houghton
- G11 - INFORMATION STORAGE
Information Patent Grant
Off-chip driver with voltage regulated predrive
- Patent number 5,440,258
- Issue date Aug 8, 1995
- International Business Machines Corporation
- Duane E. Galbi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ZAG fuse for reduced blow-current application
- Patent number 5,420,456
- Issue date May 30, 1995
- International Business Machines Corporation
- Duane E. Galbi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low voltage programmable storage element
- Patent number 5,418,738
- Issue date May 23, 1995
- International Business Machines Corporation
- Wagdi W. Abadeer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having asymmetrical CAS to data input/output mapping...
- Patent number 5,412,613
- Issue date May 2, 1995
- International Business Machines Corporation
- Duane E. Galbi
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage programmable storage element
- Patent number 5,334,880
- Issue date Aug 2, 1994
- International Business Machines Corporation
- Wagdi W. Abadeer
- G11 - INFORMATION STORAGE
Information Patent Grant
Boosted drive system for master/local word line memory architecture
- Patent number 5,255,224
- Issue date Oct 19, 1993
- International Business Machines Corporation
- Duane E. Galbi
- G11 - INFORMATION STORAGE
Information Patent Grant
Stable voltage reference circuit with high Vt devices
- Patent number 5,221,864
- Issue date Jun 22, 1993
- International Business Machines Corporation
- Duane E. Galbi
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
DATA PRE-FETCH FOR LARGE LANGUAGE MODEL (LLM) PROCESSING
- Publication number 20240370699
- Publication date Nov 7, 2024
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT (I/O) VIRTUALIZATION ACCELERATION
- Publication number 20230333921
- Publication date Oct 19, 2023
- Intel Corporation
- Noam ELATI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE ACCELERATION IN A NETWORK INTERFACE DEVICE
- Publication number 20230325265
- Publication date Oct 12, 2023
- Susanne M. Balle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS DRAM DIMM SUB-CHANNEL PAIRING
- Publication number 20230215493
- Publication date Jul 6, 2023
- Intel Corporation
- Duane E. GALBI
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNOLOGIES FOR HARDWARE MICROSERVICES ACCELERATED IN XPU
- Publication number 20230185760
- Publication date Jun 15, 2023
- Intel Corporation
- Susanne M. BALLE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE MEMORY PROTECTION LEVELS PER REGION
- Publication number 20230185658
- Publication date Jun 15, 2023
- Intel Corporation
- Duane Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTE DISAGGREGATED INFRASTRUCTURE PROCESSING UNITS (IPUS)
- Publication number 20230096451
- Publication date Mar 30, 2023
- Intel Corporation
- Salma Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE RESOURCE SHARING IN A NETWORK
- Publication number 20230029026
- Publication date Jan 26, 2023
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO STORE AND PROCESS TELEMETRY DATA IN A NETWO...
- Publication number 20220321434
- Publication date Oct 6, 2022
- Intel Corporation
- Andrzej KURIATA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROSERVICE DATA PATH AND CONTROL PATH PROCESSING
- Publication number 20220321491
- Publication date Oct 6, 2022
- Intel Corporation
- Susanne M. BALLE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
WORKLOAD EXECUTION BASED ON DEVICE CHARACTERISTICS
- Publication number 20220206864
- Publication date Jun 30, 2022
- Intel Corporation
- Sundar NADATHUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTE STORAGE FOR HARDWARE MICROSERVICES HOSTED ON XPUS AND SOC-XP...
- Publication number 20220113911
- Publication date Apr 14, 2022
- Intel Corporation
- Andrzej KURIATA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION CACHE AND CONFIGURABLE ECC MEMORY FOR REDUCING ECC MEM...
- Publication number 20220012126
- Publication date Jan 13, 2022
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE CONFIGURATION OF MEMORY MODULE DATA WIDTH
- Publication number 20220012173
- Publication date Jan 13, 2022
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING LOGIC FOR FLEXIBLE CONFIGURATION OF MEMORY MODULE DATA WIDTH
- Publication number 20220012195
- Publication date Jan 13, 2022
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESSES USING A MEMORY HUB
- Publication number 20210209035
- Publication date Jul 8, 2021
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY STRIPING APPROACH THAT INTERLEAVES SUB PROTECTED DATA WORDS
- Publication number 20210191811
- Publication date Jun 24, 2021
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM) DUAL IN-LINE MEMOR...
- Publication number 20210005234
- Publication date Jan 7, 2021
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL MEMORY WITH IMPROVED MEMORY SIDE CACHE IMPLEMENTATION
- Publication number 20200125495
- Publication date Apr 23, 2020
- Intel Corporation
- Duane E. GALBI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR FLEXIBLE PROTOCOL ACCELERATION
- Publication number 20200073846
- Publication date Mar 5, 2020
- Matthew J. Adiletta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR FLEXIBLE I/O ENDPOINT ACCELERATION
- Publication number 20200065271
- Publication date Feb 27, 2020
- Matthew J. Adiletta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES FOR REGISTER FILE WITH NOVEL BIT CELL IMPLEMENTATION
- Publication number 20100332712
- Publication date Dec 30, 2010
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ENHANCING PERFORMANCE OF DATA ENCRYPTION S...
- Publication number 20100027781
- Publication date Feb 4, 2010
- Duane E. Galbi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ECC coding for high speed implementation
- Publication number 20070168768
- Publication date Jul 19, 2007
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Engineering the di/dt curve
- Publication number 20070006012
- Publication date Jan 4, 2007
- Intel Corporation
- Praveen Mosur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for automatic resource reservation and communication that fa...
- Publication number 20040202192
- Publication date Oct 14, 2004
- Duane E. Galbi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Enhancing performance by pre-fetching and caching data directly in...
- Publication number 20020057708
- Publication date May 16, 2002
- Duane E. Galbi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for automatic resource reservation and communication that fa...
- Publication number 20020051460
- Publication date May 2, 2002
- Duane E. Galbi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Duane E. Galbi

Person

Patents Grantslast 30 patents

Memory hub providing cache coherency protocol system method for mul...

Memory striping approach that interleaves sub protected data words

Synchronous dynamic random access memory (SDRAM) dual in-line memor...

Technologies for flexible protocol acceleration

Technologies for flexible I/O endpoint acceleration

Apparatuses for register file with novel bit cell implementation

Regulating application of clock to control current rush (DI/DT)

ECC coding for high speed implementation

Method for automatic resource reservation and communication that fa...

Enhancing performance by pre-fetching and caching data directly in...

Method and apparatus for performing two pass quality video compress...

Circuitry for reading from and writing to memory cells

Method and apparatus for performing two pass quality video compress...

Method and apparatus for performing switched supply drive in CMOS p...

Fast check bit write for a semiconductor memory

CMOS processing with low and high-current FETs

Clocking circuit with increasing delay as supply voltage VDD

Off-chip driver with voltage regulated predrive

ZAG fuse for reduced blow-current application

Low voltage programmable storage element

Memory device having asymmetrical CAS to data input/output mapping...

Low voltage programmable storage element

Boosted drive system for master/local word line memory architecture

Stable voltage reference circuit with high Vt devices

Patents Applicationslast 30 patents

DATA PRE-FETCH FOR LARGE LANGUAGE MODEL (LLM) PROCESSING

INPUT/OUTPUT (I/O) VIRTUALIZATION ACCELERATION

HARDWARE ACCELERATION IN A NETWORK INTERFACE DEVICE

CROSS DRAM DIMM SUB-CHANNEL PAIRING

TECHNOLOGIES FOR HARDWARE MICROSERVICES ACCELERATED IN XPU

CONFIGURABLE MEMORY PROTECTION LEVELS PER REGION

REMOTE DISAGGREGATED INFRASTRUCTURE PROCESSING UNITS (IPUS)

FLEXIBLE RESOURCE SHARING IN A NETWORK

METHOD AND APPARATUS TO STORE AND PROCESS TELEMETRY DATA IN A NETWO...

MICROSERVICE DATA PATH AND CONTROL PATH PROCESSING

WORKLOAD EXECUTION BASED ON DEVICE CHARACTERISTICS

REMOTE STORAGE FOR HARDWARE MICROSERVICES HOSTED ON XPUS AND SOC-XP...

TRANSLATION CACHE AND CONFIGURABLE ECC MEMORY FOR REDUCING ECC MEM...

FLEXIBLE CONFIGURATION OF MEMORY MODULE DATA WIDTH

ENABLING LOGIC FOR FLEXIBLE CONFIGURATION OF MEMORY MODULE DATA WIDTH

MEMORY ACCESSES USING A MEMORY HUB

MEMORY STRIPING APPROACH THAT INTERLEAVES SUB PROTECTED DATA WORDS

SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM) DUAL IN-LINE MEMOR...

MULTI-LEVEL MEMORY WITH IMPROVED MEMORY SIDE CACHE IMPLEMENTATION

TECHNOLOGIES FOR FLEXIBLE PROTOCOL ACCELERATION

TECHNOLOGIES FOR FLEXIBLE I/O ENDPOINT ACCELERATION

APPARATUSES FOR REGISTER FILE WITH NOVEL BIT CELL IMPLEMENTATION

METHOD AND APPARATUS FOR ENHANCING PERFORMANCE OF DATA ENCRYPTION S...

ECC coding for high speed implementation

Engineering the di/dt curve

Method for automatic resource reservation and communication that fa...

Enhancing performance by pre-fetching and caching data directly in...

Method for automatic resource reservation and communication that fa...