Edward C. Hepworth

Person

Chattanooga, TN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Advanced data link controller having a plurality of multi-bit statu...
- Patent number 4,368,512
- Issue date Jan 11, 1983
- Motorola, Inc.
- Shikun Kyu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control circuitry for data transfer in an advanced data link contro...
- Patent number 4,358,825
- Issue date Nov 9, 1982
- Motorola, Inc.
- Shikun Kyu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced data link controller
- Patent number 4,346,440
- Issue date Aug 24, 1982
- Motorola, Inc.
- Shikun Kyu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Character framing circuit
- Patent number 4,284,953
- Issue date Aug 18, 1981
- Motorola, Inc.
- Edward C. Hepworth
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital data processing system with interface adaptor having progra...
- Patent number 4,263,650
- Issue date Apr 21, 1981
- Motorola, Inc.
- Thomas H. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error driven interrupt for polled MPU systems
- Patent number 4,225,917
- Issue date Sep 30, 1980
- Motorola, Inc.
- Edward C. Hepworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced data link controller
- Patent number 4,225,919
- Issue date Sep 30, 1980
- Motorola, Inc.
- Shikun Kyu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface adaptor architecture
- Patent number 4,218,740
- Issue date Aug 19, 1980
- Motorola, Inc.
- Thomas H. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interrupt status indication logic for polled interrupt digital system
- Patent number 4,106,091
- Issue date Aug 8, 1978
- Motorola, Inc.
- Edward C. Hepworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
First-in-first-out register implemented with single rank storage el...
- Patent number 4,090,256
- Issue date May 16, 1978
- Motorola, Inc.
- Edward C. Hepworth
- G11 - INFORMATION STORAGE
Information Patent Grant
Valid memory address enable system for a microprocessor system
- Patent number 4,087,855
- Issue date May 2, 1978
- Motorola, Inc.
- Thomas H. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interrupt system for microprocessor system
- Patent number 4,086,627
- Issue date Apr 25, 1978
- Motorola, Inc.
- Thomas H. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous serial data adaptor
- Patent number 4,071,887
- Issue date Jan 31, 1978
- Motorola, Inc.
- Thomas C. Daly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer synchronizing circuit
- Patent number 4,070,630
- Issue date Jan 24, 1978
- Motorola Inc.
- Edward Clare Hepworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Master slave registers for interface adaptor
- Patent number 4,020,472
- Issue date Apr 26, 1977
- Motorola, Inc.
- Thomas H. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuitry for selection of dedicated registers
- Patent number 4,006,457
- Issue date Feb 1, 1977
- Motorola, Inc.
- Edward C. Hepworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous status interlock circuit for interface adaptor
- Patent number 3,979,732
- Issue date Sep 7, 1976
- Motorola, Inc.
- Edward C. Hepworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Edge sensitive set-reset flip flop
- Patent number 3,976,949
- Issue date Aug 24, 1976
- Motorola, Inc.
- Edward C. Hepworth
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous communication interface adaptor
- Patent number 3,975,712
- Issue date Aug 17, 1976
- Motorola, Inc.
- Edward C. Hepworth
- G06 - COMPUTING CALCULATING COUNTING

Edward C. Hepworth

Person

Patents Grantslast 30 patents

Advanced data link controller having a plurality of multi-bit statu...

Control circuitry for data transfer in an advanced data link contro...

Advanced data link controller

Character framing circuit

Digital data processing system with interface adaptor having progra...

Error driven interrupt for polled MPU systems

Advanced data link controller

Interface adaptor architecture

Interrupt status indication logic for polled interrupt digital system

First-in-first-out register implemented with single rank storage el...

Valid memory address enable system for a microprocessor system

Interrupt system for microprocessor system

Synchronous serial data adaptor

Data transfer synchronizing circuit

Master slave registers for interface adaptor

Logic circuitry for selection of dedicated registers

Asynchronous status interlock circuit for interface adaptor

Edge sensitive set-reset flip flop

Asynchronous communication interface adaptor