Edward V. Bautista Jr.

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for erase voltage control during multiple sector...
- Patent number 6,891,752
- Issue date May 10, 2005
- Advanced Micro Devices
- Edward V. Bautista
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing reference current measurement mode within reference ar...
- Patent number 6,771,093
- Issue date Aug 3, 2004
- Advanced Micro Devices, Inc.
- Edward V. Bautista
- G01 - MEASURING TESTING
Information Patent Grant
On-chip erase pulse counter for efficient erase verify BIST (built-...
- Patent number 6,665,214
- Issue date Dec 16, 2003
- Advanced Micro Devices, Inc.
- Ken Cheong Cheah
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip repair of defective address of core flash memory cells
- Patent number 6,631,086
- Issue date Oct 7, 2003
- Advanced Micro Devices, Inc.
- Colin Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of micro-architectural implementation on bist fronted state...
- Patent number 6,622,274
- Issue date Sep 16, 2003
- Advanced Micro Devices, Inc.
- Weng F. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of micro-architectural implementation of interface between b...
- Patent number 6,587,982
- Issue date Jul 1, 2003
- Advanced Micro Devices, Inc.
- Weng F. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method to facilitate stabilization of reference voltage...
- Patent number 6,549,477
- Issue date Apr 15, 2003
- Advanced Micro Devices, Inc.
- Edward V. Bautista
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for soft program verification in a memory device
- Patent number 6,532,175
- Issue date Mar 11, 2003
- Advanced Micro Devices, In.
- Santosh K. Yachareni
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method to facilitate stabilization of reference voltage...
- Patent number 6,459,628
- Issue date Oct 1, 2002
- Advanced Micro Devices, Inc.
- Edward V. Bautista
- G11 - INFORMATION STORAGE
Information Patent Grant
I/O partitioning system and methodology to reduce band-to-band tunn...
- Patent number 6,385,093
- Issue date May 7, 2002
- Advanced Micro Devices, Inc.
- Edward V. Bautista
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for embedded chip erase verification
- Patent number 6,331,951
- Issue date Dec 18, 2001
- Advanced Micro Devices, Inc.
- Edward V. Bautista
- G11 - INFORMATION STORAGE
Information Patent Grant
Application of external voltage during array VT testing
- Patent number 6,324,108
- Issue date Nov 27, 2001
- Advanced Micro Devices, Inc.
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline voltage protection
- Patent number 6,285,594
- Issue date Sep 4, 2001
- Advanced Micro Devices, Inc.
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge sharing to help boost the wordlines during APDE verify
- Patent number 6,269,026
- Issue date Jul 31, 2001
- Advanced Micro Devices, Inc.
- Bhimachar Venkatesh
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage protection of write protect cams
- Patent number 6,212,098
- Issue date Apr 3, 2001
- Advanced Micro Devices, Inc.
- Santosh K. Yachareni
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Built-in-self-test (BIST) of flash memory cells and implementation...
- Publication number 20040049724
- Publication date Mar 11, 2004
- Colin Bill
- G11 - INFORMATION STORAGE

Edward V. Bautista Jr.

Person

Patents Grantslast 30 patents

System and method for erase voltage control during multiple sector...

Implementing reference current measurement mode within reference ar...

On-chip erase pulse counter for efficient erase verify BIST (built-...

On-chip repair of defective address of core flash memory cells

Method of micro-architectural implementation on bist fronted state...

Method of micro-architectural implementation of interface between b...

System and method to facilitate stabilization of reference voltage...

Method and apparatus for soft program verification in a memory device

System and method to facilitate stabilization of reference voltage...

I/O partitioning system and methodology to reduce band-to-band tunn...

Method and system for embedded chip erase verification

Application of external voltage during array VT testing

Wordline voltage protection

Charge sharing to help boost the wordlines during APDE verify

Voltage protection of write protect cams

Patents Applicationslast 30 patents

Built-in-self-test (BIST) of flash memory cells and implementation...