Erick M. Hirata

Person

Torrance, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Digitally calibrated high speed clock distribution
- Patent number 8,179,173
- Issue date May 15, 2012
- Raytheon Company
- Erick M. Hirata
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
DNL/INL trim techniques for comparator based analog to digital conv...
- Patent number 7,154,421
- Issue date Dec 26, 2006
- TelASIC Communications, Inc.
- Don C. Devendorf
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power output driver
- Patent number 7,098,700
- Issue date Aug 29, 2006
- TelASIC Communications, Inc.
- Nanci Martinez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digitally trimmed DAC cell
- Patent number 7,095,347
- Issue date Aug 22, 2006
- TelASIC Communication, Inc.
- Erick M. Hirata
- G05 - CONTROLLING REGULATING
Information Patent Grant
On-chip multilayer metal shielded transmission line
- Patent number 6,975,189
- Issue date Dec 13, 2005
- TelASIC Communications, Inc.
- Alan E. Reamon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Monolithic payload IF switch
- Patent number 6,891,424
- Issue date May 10, 2005
- TelASIC Communications, Inc.
- Erick M. Hirata
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Split cell bowtie digital to analog converter and method
- Patent number 6,879,276
- Issue date Apr 12, 2005
- TelASIC Communications, Inc.
- Don C. Devendorf
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-performance track and hold circuit
- Patent number 6,825,697
- Issue date Nov 30, 2004
- TelASIC Communications, Inc.
- Lloyd F. Linder
- G11 - INFORMATION STORAGE
Information Patent Grant
Advanced digital antenna module
- Patent number 6,768,442
- Issue date Jul 27, 2004
- Raytheon Company
- Clifford W. Meyers
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for translating digital signals
- Patent number 6,404,228
- Issue date Jun 11, 2002
- Ralph T. Luna
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-calibrating, self-correcting transceivers and methods
- Patent number 6,118,811
- Issue date Sep 12, 2000
- Raytheon Company
- Robert T. Narumi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Monolithic circuit and method for adding a randomized dither signal...
- Patent number 5,990,815
- Issue date Nov 23, 1999
- Raytheon Company
- Lloyd F. Linder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Test circuit and method of trimming a unary digital-to-analog conve...
- Patent number 5,973,631
- Issue date Oct 26, 1999
- Raytheon Company
- Donald G. McMullen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Temperature compensated amplifier
- Patent number 5,859,568
- Issue date Jan 12, 1999
- Raytheon Company
- Hieu M. Le
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mixer structures with enhanced conversion gain and reduced spurious...
- Patent number 5,859,559
- Issue date Jan 12, 1999
- Raytheon Company
- Bo S. Hong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current feedback differential amplifier clamp
- Patent number 5,859,569
- Issue date Jan 12, 1999
- Raytheon Company
- Hieu M. Le
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential logic level translator circuit with dual output logic...
- Patent number 5,428,305
- Issue date Jun 27, 1995
- Hughes Aircraft Company
- Puck Wong
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DIGITALLY CALIBRATED HIGH SPEED CLOCK DISTRIBUTION
- Publication number 20110221486
- Publication date Sep 15, 2011
- Erick M. Hirata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low power output driver
- Publication number 20050127955
- Publication date Jun 16, 2005
- Nanci Martinez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DNL/INL trim techniques for comparator based analog to digital conv...
- Publication number 20050128118
- Publication date Jun 16, 2005
- Don C. Devendorf
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Substraction circuit with a dummy digital to analog converter
- Publication number 20050038846
- Publication date Feb 17, 2005
- Don C. Devendorf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT CELL BOWTIE DIGITAL TO ANALOG CONVERTER AND METHOD
- Publication number 20050035892
- Publication date Feb 17, 2005
- Don C. Devendorf
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clamped comparator
- Publication number 20050035788
- Publication date Feb 17, 2005
- Don C. Devendorf
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Trickle current-cascode DAC
- Publication number 20040257125
- Publication date Dec 23, 2004
- William W. Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digitally trimmed DAC cell
- Publication number 20040257058
- Publication date Dec 23, 2004
- Erick M. Hirata
- G05 - CONTROLLING REGULATING

Erick M. Hirata

Person

Patents Grantslast 30 patents

Digitally calibrated high speed clock distribution

DNL/INL trim techniques for comparator based analog to digital conv...

Low power output driver

Digitally trimmed DAC cell

On-chip multilayer metal shielded transmission line

Monolithic payload IF switch

Split cell bowtie digital to analog converter and method

High-performance track and hold circuit

Advanced digital antenna module

Apparatus for translating digital signals

Self-calibrating, self-correcting transceivers and methods

Monolithic circuit and method for adding a randomized dither signal...

Test circuit and method of trimming a unary digital-to-analog conve...

Temperature compensated amplifier

Mixer structures with enhanced conversion gain and reduced spurious...

Current feedback differential amplifier clamp

Differential logic level translator circuit with dual output logic...

Patents Applicationslast 30 patents

DIGITALLY CALIBRATED HIGH SPEED CLOCK DISTRIBUTION

Low power output driver

DNL/INL trim techniques for comparator based analog to digital conv...

Substraction circuit with a dummy digital to analog converter

SPLIT CELL BOWTIE DIGITAL TO ANALOG CONVERTER AND METHOD

Clamped comparator

Trickle current-cascode DAC

Digitally trimmed DAC cell