Erik S. Jeng

Person

Chung-Li, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Manufacture method and structure of a nonvolatile memory
- Patent number 7,777,267
- Issue date Aug 17, 2010
- Erik S Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory capable of storing information and the method of forming and...
- Patent number 7,473,599
- Issue date Jan 6, 2009
- Erik S. Jeng
- G11 - INFORMATION STORAGE
Information Patent Grant
High density memory array system
- Patent number 7,457,154
- Issue date Nov 25, 2008
- Applied Intellectual Properties Co., Ltd.
- Tzu-shih Yen
- G11 - INFORMATION STORAGE
Information Patent Grant
Fringing field induced localized charge trapping memory
- Patent number 7,375,394
- Issue date May 20, 2008
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory with spacer trapping structure
- Patent number 7,235,848
- Issue date Jun 26, 2007
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating non-volatile memory by tilt-angle ion impla...
- Patent number 7,179,708
- Issue date Feb 20, 2007
- Chung Yuan Christian University
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory array
- Patent number 7,072,210
- Issue date Jul 4, 2006
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- G11 - INFORMATION STORAGE
Information Patent Grant
Mask ROM and the method of forming the same and the scheme of readi...
- Patent number 7,030,448
- Issue date Apr 18, 2006
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory capable of storing multibits binary information...
- Patent number 6,903,968
- Issue date Jun 7, 2005
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory with undercut trapping structure
- Patent number 6,885,072
- Issue date Apr 26, 2005
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method for forming flash memory device provided with ad...
- Patent number 6,767,792
- Issue date Jul 27, 2004
- Megawin Technology Co., Ltd.
- Wen-Ying Wen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory capable of storing multibits binary information...
- Patent number 6,740,927
- Issue date May 25, 2004
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming twin-spacer gate flash device and the structure o...
- Patent number 6,649,475
- Issue date Nov 18, 2003
- Megawin Technology Co., Ltd.
- Wen-Ying Wen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etching process
- Patent number 6,565,759
- Issue date May 20, 2003
- Vanguard International Semiconductor Corporation
- Bi-Ling Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating borderless and self-aligned polysilicon and...
- Patent number 6,476,488
- Issue date Nov 5, 2002
- Vanguard International Semiconductor Corp.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating reduced contacts using retardation layers
- Patent number 6,472,717
- Issue date Oct 29, 2002
- Vanguard International Semiconductor Corporation
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming contact using non-conformal dielectric liner
- Patent number 6,458,706
- Issue date Oct 1, 2002
- Vanguard International Semiconductor Corporation
- Eddy Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making DRAM using an oxide plug in the bitline contacts...
- Patent number 6,413,813
- Issue date Jul 2, 2002
- Vanguard International Semiconductor Corporation
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple etch contact etching method incorporating post contact etc...
- Patent number 6,376,384
- Issue date Apr 23, 2002
- Vanguard International Semiconductor Corporation
- Tzu-Shih Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming self-aligned contact with liner
- Patent number 6,306,759
- Issue date Oct 23, 2001
- Vanguard International Semiconductor Corporation
- Tzu-Shih Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density integrated circuits using tapered and self-aligned con...
- Patent number 6,278,189
- Issue date Aug 21, 2001
- Vanguard International Semiconductor Corporation
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming self-aligned contacts using a hard mask
- Patent number 6,265,296
- Issue date Jul 24, 2001
- Vanguard International Semiconductor Corporation
- Tzu-Shih Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a self-aligned contact
- Patent number 6,248,643
- Issue date Jun 19, 2001
- Vanguard International Semiconductor Corporation
- Chien-Sheng Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing multi-level contacts
- Patent number 6,245,656
- Issue date Jun 12, 2001
- Vanguard International Semiconductor Corporation
- Bi-Ling Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of self-aligned contact hole etching by fluorine-containing...
- Patent number 6,239,011
- Issue date May 29, 2001
- Vanguard International Semiconductor Corporation
- Bi-Ling Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device
- Patent number 6,235,621
- Issue date May 22, 2001
- Vanguard International Semiconductor Corporation
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anti-reflection oxynitride film for polysilicon substrates
- Patent number 6,221,558
- Issue date Apr 24, 2001
- Vanguard International Semiconductor Corporation
- Liang-Gi Yao
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Contact structure using taper contact etching and polycide step
- Patent number 6,211,557
- Issue date Apr 3, 2001
- Vanguard International Semiconductor Corporation
- Jun-Cheng Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a capacitor under bit line DRAM structure usi...
- Patent number 6,184,081
- Issue date Feb 6, 2001
- Vanguard International Semiconductor Corporation
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of finely controlled shallow trench isolation for ULSI pr...
- Patent number 6,180,489
- Issue date Jan 30, 2001
- Vanguard International Semiconductor Corporation
- Fu-Liang Yang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR MEMORY UNIT AND ARRAY
- Publication number 20090027942
- Publication date Jan 29, 2009
- APPLIED INTERLLECTUAL PROPERTIES
- YUAN-FENG CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MANUFACTURE METHOD AND STRUCTURE OF A NONVOLATILE MEMORY
- Publication number 20080150048
- Publication date Jun 26, 2008
- CHUNG YUAN CHRISTIAN UNIVERSITY
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory capable of storing information and the method of forming and...
- Publication number 20070147124
- Publication date Jun 28, 2007
- Erik S. Jeng
- G11 - INFORMATION STORAGE
Information Patent Application
Fringing field induced localized charge trapping memory
- Publication number 20070018245
- Publication date Jan 25, 2007
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High density memory array system
- Publication number 20060239070
- Publication date Oct 26, 2006
- Applied Intellectual Property Co., Ltd.
- Tzu-shih Yen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory capable of storing information and the method of forming and...
- Publication number 20060094170
- Publication date May 4, 2006
- Erik S. Jeng
- G11 - INFORMATION STORAGE
Information Patent Application
Process for fabricating non-volatile memory by tilt-angle ion impla...
- Publication number 20060019441
- Publication date Jan 26, 2006
- Chung Yuan Christian University
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory array
- Publication number 20050237797
- Publication date Oct 27, 2005
- Erik S. Jeng
- G11 - INFORMATION STORAGE
Information Patent Application
Mask ROM and the method of forming the same and the scheme of readi...
- Publication number 20050227420
- Publication date Oct 13, 2005
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatile memory with undercut trapping structure
- Publication number 20050156227
- Publication date Jul 21, 2005
- Applied Intellectual Properties Co., Ltd.
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacture method and structure of a nonvolatile memory
- Publication number 20050156228
- Publication date Jul 21, 2005
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Mask ROM and the method of forming the same and the scheme of readi...
- Publication number 20050156226
- Publication date Jul 21, 2005
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatile memory with spacer trapping structure
- Publication number 20050121715
- Publication date Jun 9, 2005
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NONVOLATILE MEMORY WITH UNDERCUT TRAPPING STRUCTURE
- Publication number 20050104143
- Publication date May 19, 2005
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatile memory capable of storing multibits binary information...
- Publication number 20040256661
- Publication date Dec 23, 2004
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatilememory capable of storing multibits binary information a...
- Publication number 20040151021
- Publication date Aug 5, 2004
- Erik S. Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming twin-spacer gate FLASH device and the structure o...
- Publication number 20030223299
- Publication date Dec 4, 2003
- Wen-Ying Wen
- H01 - BASIC ELECTRIC ELEMENTS

Erik S. Jeng

Person

Patents Grantslast 30 patents

Manufacture method and structure of a nonvolatile memory

Memory capable of storing information and the method of forming and...

High density memory array system

Fringing field induced localized charge trapping memory

Nonvolatile memory with spacer trapping structure

Process for fabricating non-volatile memory by tilt-angle ion impla...

Memory array

Mask ROM and the method of forming the same and the scheme of readi...

Nonvolatile memory capable of storing multibits binary information...

Nonvolatile memory with undercut trapping structure

Fabrication method for forming flash memory device provided with ad...

Nonvolatile memory capable of storing multibits binary information...

Method of forming twin-spacer gate flash device and the structure o...

Etching process

Method for fabricating borderless and self-aligned polysilicon and...

Method for fabricating reduced contacts using retardation layers

Method of forming contact using non-conformal dielectric liner

Method for making DRAM using an oxide plug in the bitline contacts...

Multiple etch contact etching method incorporating post contact etc...

Method for forming self-aligned contact with liner

High density integrated circuits using tapered and self-aligned con...

Method for forming self-aligned contacts using a hard mask

Method of fabricating a self-aligned contact

Method for producing multi-level contacts

Method of self-aligned contact hole etching by fluorine-containing...

Method for forming a semiconductor device

Anti-reflection oxynitride film for polysilicon substrates

Contact structure using taper contact etching and polycide step

Method of fabricating a capacitor under bit line DRAM structure usi...

Formation of finely controlled shallow trench isolation for ULSI pr...

Patents Applicationslast 30 patents

SEMICONDUCTOR MEMORY UNIT AND ARRAY

MANUFACTURE METHOD AND STRUCTURE OF A NONVOLATILE MEMORY

Memory capable of storing information and the method of forming and...

Fringing field induced localized charge trapping memory

High density memory array system

Memory capable of storing information and the method of forming and...

Process for fabricating non-volatile memory by tilt-angle ion impla...

Memory array

Mask ROM and the method of forming the same and the scheme of readi...

Nonvolatile memory with undercut trapping structure

Manufacture method and structure of a nonvolatile memory

Mask ROM and the method of forming the same and the scheme of readi...

Nonvolatile memory with spacer trapping structure

NONVOLATILE MEMORY WITH UNDERCUT TRAPPING STRUCTURE

Nonvolatile memory capable of storing multibits binary information...

Nonvolatilememory capable of storing multibits binary information a...

Method of forming twin-spacer gate FLASH device and the structure o...