Frank D. Egitto

Person

Binghampton, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Coreless layer buildup structure with LGA and joining layer
- Patent number 9,351,408
- Issue date May 24, 2016
- i3 ELECTRONICS, INC.
- Voya Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Substrate having internal capacitor and method of making same
- Patent number 8,607,445
- Issue date Dec 17, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic package with thermal interposer and method of making same
- Patent number 8,558,374
- Issue date Oct 15, 2013
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Coreless layer buildup structure
- Patent number 8,541,687
- Issue date Sep 24, 2013
- Endicott Interconnect Technologies, Inc.
- Voya Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Coreless layer buildup structure with LGA
- Patent number 8,536,459
- Issue date Sep 17, 2013
- Endicott Interconnect Technologies, Inc.
- Voya Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of forming an electrically conductive printed line
- Patent number 8,499,445
- Issue date Aug 6, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of forming multilayer capacitors in a printed circuit substrate
- Patent number 8,501,575
- Issue date Aug 6, 2013
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic package including high density interposer and circuitize...
- Patent number 8,405,229
- Issue date Mar 26, 2013
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of making high density interposer and electronic package uti...
- Patent number 8,245,392
- Issue date Aug 21, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making circuitized substrates having film resistors as pa...
- Patent number 8,240,027
- Issue date Aug 14, 2012
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of joining a semiconductor device/chip to a printed wiring b...
- Patent number 8,240,031
- Issue date Aug 14, 2012
- Endicott International Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semi-conductor chip with compressible contact structure and electro...
- Patent number 8,198,739
- Issue date Jun 12, 2012
- Endicott Interconnect Technologies, Inc.
- How Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layered interconnect structure using liquid crystalline polym...
- Patent number 7,981,245
- Issue date Jul 19, 2011
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Capacitive substrate
- Patent number 7,897,877
- Issue date Mar 1, 2011
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High speed interposer
- Patent number 7,875,811
- Issue date Jan 25, 2011
- Endicott Interconnect Technologies, Inc.
- David V. Caletka
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making multilayered circuitized substrate assembly
- Patent number 7,823,274
- Issue date Nov 2, 2010
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Capacitive substrate and method of making same
- Patent number 7,803,688
- Issue date Sep 28, 2010
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with internal stacked semiconductor chips, me...
- Patent number 7,800,916
- Issue date Sep 21, 2010
- Endicott Interconnect Technologies, Inc.
- Kim J. Blackwell
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-layered interconnect structure using liquid crystalline polym...
- Patent number 7,777,136
- Issue date Aug 17, 2010
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with internal cooling structure and electrica...
- Patent number 7,738,249
- Issue date Jun 15, 2010
- Endicott Interconnect Technologies, Inc.
- Benson Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuitized substrate with shielded signal lines and plated-thru-ho...
- Patent number 7,679,005
- Issue date Mar 16, 2010
- Endicott Interconnect Technologies, Inc.
- Benson Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed interposer
- Patent number 7,629,541
- Issue date Dec 8, 2009
- Endicott Interconnect Technologies, Inc.
- David V. Caletka
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making a circuitized substrate
- Patent number 7,596,862
- Issue date Oct 6, 2009
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making an interposer
- Patent number 7,511,518
- Issue date Mar 31, 2009
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- G01 - MEASURING TESTING
Information Patent Grant
Interposer and test assembly for testing electronic devices
- Patent number 7,501,839
- Issue date Mar 10, 2009
- Endicott Interconnect Technologies, Inc.
- Benson Chan
- G01 - MEASURING TESTING
Information Patent Grant
Circuitized substrate with sintered paste connections, multilayered...
- Patent number 7,342,183
- Issue date Mar 11, 2008
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making mutilayered circuitized substrate assembly having...
- Patent number 7,334,323
- Issue date Feb 26, 2008
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of making a circuitized substrate
- Patent number 7,325,299
- Issue date Feb 5, 2008
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Structure and method for improved adhesion between two polymer films
- Patent number 7,309,529
- Issue date Dec 18, 2007
- International Business Machines Corporation
- Frank D. Egitto
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Grant
Method of treating conductive layer for use in a circuitized substr...
- Patent number 7,307,022
- Issue date Dec 11, 2007
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
LIQUID CRYSTAL POLYMER (LCP) SURFACE LAYER ADHESION ENHANCEMENT
- Publication number 20130033671
- Publication date Feb 7, 2013
- Endicott Interconnect Technologies, Inc.
- Mark Schadt
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
THERMAL SUBSTRATE
- Publication number 20130025839
- Publication date Jan 31, 2013
- Endicott Interconnect Technologies, Inc.
- Frank Egitto
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Application
MODULAR, DETACHABLE COMPUTE LEAF FOR USE WITH COMPUTING SYSTEM
- Publication number 20120260063
- Publication date Oct 11, 2012
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CONDUCTIVE METAL NUB FOR ENHANCED ELECTRICAL INTERCONNECTION, AND I...
- Publication number 20120243155
- Publication date Sep 27, 2012
- Endicott Interconnect Technologies, Inc.
- Luis J. Matienzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTILAYER CAPACITORS IN A PRINTED CIRCUIT SUBSTRATE
- Publication number 20120223047
- Publication date Sep 6, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ELECTRONIC PACKAGE WITH THERMAL INTERPOSER AND METHOD OF MAKING SAME
- Publication number 20120201006
- Publication date Aug 9, 2012
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CORELESS LAYER BUILDUP STRUCTURE
- Publication number 20120160547
- Publication date Jun 28, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CORELESS LAYER BUILDUP STRUCTURE WITH LGA
- Publication number 20120160544
- Publication date Jun 28, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ELECTRONIC PACKAGE AND METHOD OF MAKING SAME
- Publication number 20120162928
- Publication date Jun 28, 2012
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH BANDWIDTH SEMICONDUCTOR BALL GRID ARRAY PACKAGE
- Publication number 20120112345
- Publication date May 10, 2012
- Endicott Interconnect Technologies, Inc.
- Kim J. Blackwell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMI-CONDUCTOR CHIP WITH COMPRESSIBLE CONTACT STRUCTURE AND ELECTRO...
- Publication number 20120038046
- Publication date Feb 16, 2012
- How Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORELESS LAYER BUILDUP STRUCTURE WITH LGA AND JOINING LAYER
- Publication number 20120031649
- Publication date Feb 9, 2012
- Endicott Interconnect Technologies, Inc.
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH DENSITY DECAL AND METHOD FOR ATTACHING SAME
- Publication number 20120015532
- Publication date Jan 19, 2012
- Endicott Interconnect Technologies, Inc.
- Voya R. Markovich
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
METHOD FOR VIA PLATING IN ELECTRONIC PACKAGES CONTAINING FLUOROPOLY...
- Publication number 20110260299
- Publication date Oct 27, 2011
- Endicott Interconnect Technologies, Inc.
- Robert D. Edwards
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making high density interposer and electronic package uti...
- Publication number 20110126408
- Publication date Jun 2, 2011
- Timothy Antesberger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electronic package including high density interposer and circuitize...
- Publication number 20110127664
- Publication date Jun 2, 2011
- Timothy Antesberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYM...
- Publication number 20100218891
- Publication date Sep 2, 2010
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Capacitive substrate and method of making same
- Publication number 20090206051
- Publication date Aug 20, 2009
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making circuitized substrates having film resistors as pa...
- Publication number 20090178271
- Publication date Jul 16, 2009
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with internal cooling structure and electrica...
- Publication number 20090109624
- Publication date Apr 30, 2009
- Endicott Interconnect Technologies, Inc.
- Benson Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making a circuitized substrate having at least one capaci...
- Publication number 20080248596
- Publication date Oct 9, 2008
- Endicott Interconnect Technologies, Inc.
- Rabindra N. Das
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with internal stacked semiconductor chips, me...
- Publication number 20080244902
- Publication date Oct 9, 2008
- Endicott Interconnect Technologies, Inc.
- Kim J. Blackwell
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYM...
- Publication number 20080217050
- Publication date Sep 11, 2008
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYM...
- Publication number 20080178999
- Publication date Jul 31, 2008
- International Business Machines Corporation
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
High speed interposer
- Publication number 20080142258
- Publication date Jun 19, 2008
- Endicott Interconnect Technologies, Inc.
- David V. Caletka
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making high speed interposer
- Publication number 20080120835
- Publication date May 29, 2008
- Endicott Interconnect Technologies, Inc.
- David V. Caletka
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with sintered paste connections and multilaye...
- Publication number 20080105457
- Publication date May 8, 2008
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Circuitized substrate with increased roughness conductive layer as...
- Publication number 20080054476
- Publication date Mar 6, 2008
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making multilayered circuitized substrate assembly
- Publication number 20080022520
- Publication date Jan 31, 2008
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of making an interposer
- Publication number 20080020566
- Publication date Jan 24, 2008
- Endicott Interconnect Technologies, Inc.
- Frank D. Egitto
- G01 - MEASURING TESTING

Frank D. Egitto

Person

Patents Grantslast 30 patents

Coreless layer buildup structure with LGA and joining layer

Substrate having internal capacitor and method of making same

Electronic package with thermal interposer and method of making same

Coreless layer buildup structure

Coreless layer buildup structure with LGA

Method of forming an electrically conductive printed line

Method of forming multilayer capacitors in a printed circuit substrate

Electronic package including high density interposer and circuitize...

Method of making high density interposer and electronic package uti...

Method of making circuitized substrates having film resistors as pa...

Method of joining a semiconductor device/chip to a printed wiring b...

Semi-conductor chip with compressible contact structure and electro...

Multi-layered interconnect structure using liquid crystalline polym...

Capacitive substrate

High speed interposer

Method of making multilayered circuitized substrate assembly

Capacitive substrate and method of making same

Circuitized substrate with internal stacked semiconductor chips, me...

Multi-layered interconnect structure using liquid crystalline polym...

Circuitized substrate with internal cooling structure and electrica...

Circuitized substrate with shielded signal lines and plated-thru-ho...

High speed interposer

Method of making a circuitized substrate

Method of making an interposer

Interposer and test assembly for testing electronic devices

Circuitized substrate with sintered paste connections, multilayered...

Method of making mutilayered circuitized substrate assembly having...

Method of making a circuitized substrate

Structure and method for improved adhesion between two polymer films

Method of treating conductive layer for use in a circuitized substr...

Patents Applicationslast 30 patents

LIQUID CRYSTAL POLYMER (LCP) SURFACE LAYER ADHESION ENHANCEMENT

THERMAL SUBSTRATE

MODULAR, DETACHABLE COMPUTE LEAF FOR USE WITH COMPUTING SYSTEM

CONDUCTIVE METAL NUB FOR ENHANCED ELECTRICAL INTERCONNECTION, AND I...

METHOD OF FORMING MULTILAYER CAPACITORS IN A PRINTED CIRCUIT SUBSTRATE

ELECTRONIC PACKAGE WITH THERMAL INTERPOSER AND METHOD OF MAKING SAME

CORELESS LAYER BUILDUP STRUCTURE

CORELESS LAYER BUILDUP STRUCTURE WITH LGA

ELECTRONIC PACKAGE AND METHOD OF MAKING SAME

HIGH BANDWIDTH SEMICONDUCTOR BALL GRID ARRAY PACKAGE

SEMI-CONDUCTOR CHIP WITH COMPRESSIBLE CONTACT STRUCTURE AND ELECTRO...

CORELESS LAYER BUILDUP STRUCTURE WITH LGA AND JOINING LAYER

HIGH DENSITY DECAL AND METHOD FOR ATTACHING SAME

METHOD FOR VIA PLATING IN ELECTRONIC PACKAGES CONTAINING FLUOROPOLY...

Method of making high density interposer and electronic package uti...

Electronic package including high density interposer and circuitize...

MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYM...

Capacitive substrate and method of making same

Method of making circuitized substrates having film resistors as pa...

Circuitized substrate with internal cooling structure and electrica...

Method of making a circuitized substrate having at least one capaci...

Circuitized substrate with internal stacked semiconductor chips, me...

MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYM...

MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYM...

High speed interposer

Method of making high speed interposer

Circuitized substrate with sintered paste connections and multilaye...

Circuitized substrate with increased roughness conductive layer as...

Method of making multilayered circuitized substrate assembly

Method of making an interposer