Fred Session

Person

Sandy, UT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus related to termination regions of a semicondu...
- Patent number 10,749,027
- Issue date Aug 18, 2020
- FAIRCHILD SEMICONDUCTOR CORPORATION
- Joseph A. Yedinak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Termination region of a semiconductor device
- Patent number 9,496,391
- Issue date Nov 15, 2016
- Fairchild Semiconductor Corporation
- Joseph A. Yedinak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming low resistance gate for power MOSFET applications
- Patent number 8,592,277
- Issue date Nov 26, 2013
- Fairchild Semiconductor Corporation
- Sreevatsa Sreekantham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double layer metal (DLM) power MOSFET
- Patent number 8,502,313
- Issue date Aug 6, 2013
- Fairchild Semiconductor Corporation
- Rohit Dikshit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with a planar Schottky contact
- Patent number 8,450,798
- Issue date May 28, 2013
- Fairchild Semiconductor Corporation
- Fred Session
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar TMBS rectifier
- Patent number 8,044,461
- Issue date Oct 25, 2011
- Fairchild Semiconductor Corporation
- Fred Session
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance gate for power MOSFET applications and method of man...
- Patent number 7,807,536
- Issue date Oct 5, 2010
- Fairchild Semiconductor Corporation
- Sreevatsa Sreekantham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for forming a planar schottky contact
- Patent number 7,732,842
- Issue date Jun 8, 2010
- Fairchild Semiconductor Corporation
- Fred Session
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming inter-poly dielectric in shielded gate field eff...
- Patent number 7,598,144
- Issue date Oct 6, 2009
- Fairchild Semiconductor Corporation
- Robert Herrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shielded gate field effect transistor with improved inter-poly diel...
- Patent number 7,385,248
- Issue date Jun 10, 2008
- Fairchild Semiconductor Corporation
- Robert Herrick
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS RELATED TO TERMINATION REGIONS OF A SEMICONDU...
- Publication number 20190245078
- Publication date Aug 8, 2019
- Fairchild Semiconductor Corporation
- Joseph A. Yedinak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS RELATED TO TERMINATION REGIONS OF A SEMICONDU...
- Publication number 20140264569
- Publication date Sep 18, 2014
- Fairchild Semiconductor Corporation
- Joseph A. YEDINAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE LAYER METAL (DLM) POWER MOSFET
- Publication number 20120267714
- Publication date Oct 25, 2012
- Rohit Dikshit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and Method for Forming a Planar Schottky Contact
- Publication number 20120098061
- Publication date Apr 26, 2012
- Fred Session
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Planar TMBS rectifier
- Publication number 20110079845
- Publication date Apr 7, 2011
- Fred Session
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming Low Resistance Gate for Power MOSFET Applications
- Publication number 20110014763
- Publication date Jan 20, 2011
- Sreevatsa Sreekantham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and Method for Forming a Planar Schottky Contact
- Publication number 20080135889
- Publication date Jun 12, 2008
- Fred Session
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Inter-Poly Dielectric in Shielded Gate Field Eff...
- Publication number 20080090339
- Publication date Apr 17, 2008
- Robert Herrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW RESISTANCE GATE FOR POWER MOSFET APPLICATIONS AND METHOD OF MAN...
- Publication number 20070190728
- Publication date Aug 16, 2007
- Sreevatsa Sreekantham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for forming inter-poly dielectric in a shielde...
- Publication number 20070037327
- Publication date Feb 15, 2007
- Robert Herrick
- H01 - BASIC ELECTRIC ELEMENTS

Fred Session

Person

Patents Grantslast 30 patents

Methods and apparatus related to termination regions of a semicondu...

Termination region of a semiconductor device

Method of forming low resistance gate for power MOSFET applications

Double layer metal (DLM) power MOSFET

Semiconductor structure with a planar Schottky contact

Planar TMBS rectifier

Low resistance gate for power MOSFET applications and method of man...

Structure and method for forming a planar schottky contact

Method for forming inter-poly dielectric in shielded gate field eff...

Shielded gate field effect transistor with improved inter-poly diel...

Patents Applicationslast 30 patents

METHODS AND APPARATUS RELATED TO TERMINATION REGIONS OF A SEMICONDU...

METHODS AND APPARATUS RELATED TO TERMINATION REGIONS OF A SEMICONDU...

DOUBLE LAYER METAL (DLM) POWER MOSFET

Structure and Method for Forming a Planar Schottky Contact

Planar TMBS rectifier

Method of Forming Low Resistance Gate for Power MOSFET Applications

Structure and Method for Forming a Planar Schottky Contact

Method for Forming Inter-Poly Dielectric in Shielded Gate Field Eff...

LOW RESISTANCE GATE FOR POWER MOSFET APPLICATIONS AND METHOD OF MAN...

Structure and method for forming inter-poly dielectric in a shielde...