Gajendra Singh

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hum generation using representative circuitry
- Patent number 9,960,771
- Issue date May 1, 2018
- Wave Computing, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-threshold flash NCL logic circuitry with flash reset
- Patent number 9,385,715
- Issue date Jul 5, 2016
- Wave Computing, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device with reduced leakage current and method for ma...
- Patent number 9,361,950
- Issue date Jun 7, 2016
- COLD BRICK SEMICONDUCTOR, INC.
- Gajendra Prasad Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-threshold circuitry based on silicon-on-insulator technology
- Patent number 9,257,984
- Issue date Feb 9, 2016
- Wave Semiconductor, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Implementation method for fast NCL data path
- Patent number 9,203,406
- Issue date Dec 1, 2015
- Wave Semiconductor, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-threshold flash NCL circuitry
- Patent number 9,024,655
- Issue date May 5, 2015
- Wave Semiconductor, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-ready flash null convention logic
- Patent number 8,981,812
- Issue date Mar 17, 2015
- Wave Semiconductor, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Thread switch circuit design and signal encoding for vertical threa...
- Patent number 7,120,915
- Issue date Oct 10, 2006
- Sun Microsystems, Inc.
- Gajendra P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating different delay ratios for a strobe delay
- Patent number 7,109,767
- Issue date Sep 19, 2006
- Sun Microsystems, Inc.
- Brian W. Amick
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital delay locked loop with extended phase capture range
- Patent number 7,107,475
- Issue date Sep 12, 2006
- Sun Microsystems, Inc.
- Brian Amick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense amplifier type input receiver with improved clk to Q
- Patent number 6,747,485
- Issue date Jun 8, 2004
- Sun Microsystems, Inc.
- Samudyatha Suryanarayana
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power memory design with asymmetric bit line driver
- Patent number 6,707,721
- Issue date Mar 16, 2004
- Sun Microsystems, Inc.
- Gajendra Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for operating a boundary scan cell design for high performan...
- Patent number 6,578,168
- Issue date Jun 10, 2003
- Sun Microsystems, Inc.
- Ishwardutt Parulkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current steering logic circuits
- Patent number 6,570,409
- Issue date May 27, 2003
- Sun Microsystems, Inc.
- Priya Ananthanarayanan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Boundary scan cell design for high performance I/O cells
- Patent number 6,567,944
- Issue date May 20, 2003
- Sun Microsystems, Inc.
- Gajendra P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power read scheme for memory array structures
- Patent number 6,442,099
- Issue date Aug 27, 2002
- Sun Microsystems, Inc.
- Shree Kant
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse-based high speed flop circuit
- Patent number 6,433,603
- Issue date Aug 13, 2002
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed multiple-bit flip-flop
- Patent number 6,420,903
- Issue date Jul 16, 2002
- Sun Microsystems, Inc.
- Gajendra P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic termination and clamping circuit
- Patent number 6,388,495
- Issue date May 14, 2002
- Sun Microsystems, Inc.
- Aninda Roy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overshoot/undershoot protection scheme for low voltage output buffer
- Patent number 6,097,237
- Issue date Aug 1, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low voltage CMOS input buffer with undershoot/overshoot protection
- Patent number 6,091,265
- Issue date Jul 18, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High voltage input buffer circuit using low voltage transistors
- Patent number 6,069,515
- Issue date May 30, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process compensated output driver with slew rate control
- Patent number 6,064,230
- Issue date May 16, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Diver circuit for 3.3v I/O buffer using 1.9v fabrication process
- Patent number 6,057,710
- Issue date May 2, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bias generator circuit for low voltage applications
- Patent number 6,046,944
- Issue date Apr 4, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic biasing for overshoot and undershoot protection circuits
- Patent number 6,043,702
- Issue date Mar 28, 2000
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pull-down driver circuit for 3.3V I/O buffer using 1.9V fabrication...
- Patent number 5,999,034
- Issue date Dec 7, 1999
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic bias circuit for driving low voltage I/O transistors
- Patent number 5,973,534
- Issue date Oct 26, 1999
- Sun Microsystems, Inc.
- Gajendra P. Singh
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
PROGRAM COUNTER ALIGNMENT ACROSS A RECONFIGURABLE HUM FABRIC
- Publication number 20170364473
- Publication date Dec 21, 2017
- Wave Computing, Inc.
- Gajendra Prasad Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HUM GENERATION USING REPRESENTATIVE CIRCUITRY
- Publication number 20170288674
- Publication date Oct 5, 2017
- Wave Computing, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-THRESHOLD FLASH NCL LOGIC CIRCUITRY WITH FLASH RESET
- Publication number 20150236695
- Publication date Aug 20, 2015
- Wave Semiconductor, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-THRESHOLD CIRCUITRY BASED ON SILICON-ON-INSULATOR TECHNOLOGY
- Publication number 20150076564
- Publication date Mar 19, 2015
- WAVE SEMICONDUCTOR, INC.
- Gajendra Prasad Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTATION METHOD FOR FAST NCL DATA PATH
- Publication number 20130249594
- Publication date Sep 26, 2013
- WAVE SEMICONDUCTOR, INC.
- Gajendra Prasad Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-READY FLASH NULL CONVENTION LOGIC
- Publication number 20130214814
- Publication date Aug 22, 2013
- WAVE SEMICONDUCTOR, INC.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-THRESHOLD FLASH NCL CIRCUITRY
- Publication number 20130214813
- Publication date Aug 22, 2013
- WAVE SEMICONDUCTOR, INC.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE WITH REDUCED LEAKAGE CURRENT AND METHOD FOR MA...
- Publication number 20130107651
- Publication date May 2, 2013
- Cold Brick Semiconductor, Inc.
- Gajendra Prasad Singh
- G11 - INFORMATION STORAGE
Information Patent Application
ON BOARD WIRELESS DIGITAL ENTERTAINMENT, COMMUNICATION AND INFORMAT...
- Publication number 20090007192
- Publication date Jan 1, 2009
- GAJENDRA PRASAD SINGH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Computer system and method
- Publication number 20070091104
- Publication date Apr 26, 2007
- Gajendra Prasad Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low power memory design with asymmetric bit line driver
- Publication number 20030174535
- Publication date Sep 18, 2003
- Gajendra Singh
- G11 - INFORMATION STORAGE
Information Patent Application
Current steering logic circuits
- Publication number 20020145451
- Publication date Oct 10, 2002
- Priya Ananthanarayanan
- H03 - BASIC ELECTRONIC CIRCUITRY

Gajendra Singh

Person

Patents Grantslast 30 patents

Hum generation using representative circuitry

Multi-threshold flash NCL logic circuitry with flash reset

Semiconductor device with reduced leakage current and method for ma...

Multi-threshold circuitry based on silicon-on-insulator technology

Implementation method for fast NCL data path

Multi-threshold flash NCL circuitry

Self-ready flash null convention logic

Thread switch circuit design and signal encoding for vertical threa...

Generating different delay ratios for a strobe delay

Digital delay locked loop with extended phase capture range

Sense amplifier type input receiver with improved clk to Q

Low power memory design with asymmetric bit line driver

Method for operating a boundary scan cell design for high performan...

Current steering logic circuits

Boundary scan cell design for high performance I/O cells

Low power read scheme for memory array structures

Pulse-based high speed flop circuit

High speed multiple-bit flip-flop

Dynamic termination and clamping circuit

Overshoot/undershoot protection scheme for low voltage output buffer

Low voltage CMOS input buffer with undershoot/overshoot protection

High voltage input buffer circuit using low voltage transistors

Process compensated output driver with slew rate control

Diver circuit for 3.3v I/O buffer using 1.9v fabrication process

Bias generator circuit for low voltage applications

Dynamic biasing for overshoot and undershoot protection circuits

Pull-down driver circuit for 3.3V I/O buffer using 1.9V fabrication...

Dynamic bias circuit for driving low voltage I/O transistors

Patents Applicationslast 30 patents

PROGRAM COUNTER ALIGNMENT ACROSS A RECONFIGURABLE HUM FABRIC

HUM GENERATION USING REPRESENTATIVE CIRCUITRY

MULTI-THRESHOLD FLASH NCL LOGIC CIRCUITRY WITH FLASH RESET

MULTI-THRESHOLD CIRCUITRY BASED ON SILICON-ON-INSULATOR TECHNOLOGY

IMPLEMENTATION METHOD FOR FAST NCL DATA PATH

SELF-READY FLASH NULL CONVENTION LOGIC

MULTI-THRESHOLD FLASH NCL CIRCUITRY

SEMICONDUCTOR DEVICE WITH REDUCED LEAKAGE CURRENT AND METHOD FOR MA...

ON BOARD WIRELESS DIGITAL ENTERTAINMENT, COMMUNICATION AND INFORMAT...

Computer system and method

Low power memory design with asymmetric bit line driver

Current steering logic circuits