George A. Spix

Person

Eau Claire, WI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for user side scheduling in a multiprocessor o...
- Patent number 6,195,676
- Issue date Feb 27, 2001
- Silicon Graphics, Inc.
- George A. Spix
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioned addressing apparatus for vector/scalar registers
- Patent number 5,745,721
- Issue date Apr 28, 1998
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system for processing one and two parcel instructions
- Patent number 5,717,881
- Issue date Feb 10, 1998
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of processing conditional branch instructions in scalar/vect...
- Patent number 5,706,490
- Issue date Jan 6, 1998
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector/scalar processor with simultaneous processing and instructio...
- Patent number 5,659,706
- Issue date Aug 19, 1997
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for chaining vector instructions
- Patent number 5,640,524
- Issue date Jun 17, 1997
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of processing a sequence of conditional vector IF statements
- Patent number 5,623,650
- Issue date Apr 22, 1997
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor having functional unit paths of differing pipeline...
- Patent number 5,598,547
- Issue date Jan 28, 1997
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaved memory access system having variable-sized segments log...
- Patent number 5,561,784
- Issue date Oct 1, 1996
- Cray Research, Inc.
- Steve S. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor having registers for control by vector resisters
- Patent number 5,544,337
- Issue date Aug 6, 1996
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for accessing global registers in a multiproce...
- Patent number 5,524,255
- Issue date Jun 4, 1996
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a multiprocessor resource lockout instruction
- Patent number 5,499,356
- Issue date Mar 12, 1996
- Cray Research, Inc.
- Roger E. Eckert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System having integrated dispatcher for self scheduling processors...
- Patent number 5,452,452
- Issue date Sep 19, 1995
- Cray Research, Inc.
- Gregory G. Gaetner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar/vector processor
- Patent number 5,430,884
- Issue date Jul 4, 1995
- Cray Research, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a unified parallel processing architecture
- Patent number 5,428,803
- Issue date Jun 27, 1995
- Cray Research, Inc.
- Steve S. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributing system for multi-processor input and output using chan...
- Patent number 5,388,217
- Issue date Feb 7, 1995
- Cray Research, Inc.
- Gary E. Benzschawel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual level scheduling of processes to multiple parallel regions of...
- Patent number 5,339,415
- Issue date Aug 16, 1994
- Cray Research, Inc.
- Robert E. Strout
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control and maintenance subsystem network for use with a multiproce...
- Patent number 5,253,359
- Issue date Oct 12, 1993
- SuperComputer Systems Limited Partnership
- George A. Spix
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dedicated centralized signaling mechanism for selectively signaling...
- Patent number 5,239,629
- Issue date Aug 24, 1993
- SuperComputer Systems Limited Partnership
- Edward C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for communicating among processors having different speeds
- Patent number 5,202,988
- Issue date Apr 13, 1993
- SuperComputer Systems Limited Partnership
- George A. Spix
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cluster architecture for a highly parallel scalar/vector multiproce...
- Patent number 5,197,130
- Issue date Mar 23, 1993
- SuperComputer Systems Limited Partnership
- Steve S. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast interrupt mechanism for interrupting processors in parallel in...
- Patent number 5,193,187
- Issue date Mar 9, 1993
- SuperComputer Systems Limited Partnership
- Robert E. Strout
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling a highly parallel multiprocessor...
- Patent number 5,179,702
- Issue date Jan 12, 1993
- SuperComputer Systems Limited Partnership
- George A. Spix
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed architecture for input/output for a multiprocessor system
- Patent number 5,168,547
- Issue date Dec 1, 1992
- SuperComputer Systems Limited Partnership
- Edward C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global registers for a multiprocessor system
- Patent number 5,165,038
- Issue date Nov 17, 1992
- SuperComputer Systems Limited Partnership
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING

George A. Spix

Person

Patents Grantslast 30 patents

Method and apparatus for user side scheduling in a multiprocessor o...

Partitioned addressing apparatus for vector/scalar registers

Data processing system for processing one and two parcel instructions

Method of processing conditional branch instructions in scalar/vect...

Vector/scalar processor with simultaneous processing and instructio...

Method and apparatus for chaining vector instructions

Method of processing a sequence of conditional vector IF statements

Vector processor having functional unit paths of differing pipeline...

Interleaved memory access system having variable-sized segments log...

Vector processor having registers for control by vector resisters

Method and apparatus for accessing global registers in a multiproce...

Method and apparatus for a multiprocessor resource lockout instruction

System having integrated dispatcher for self scheduling processors...

Scalar/vector processor

Method and apparatus for a unified parallel processing architecture

Distributing system for multi-processor input and output using chan...

Dual level scheduling of processes to multiple parallel regions of...

Control and maintenance subsystem network for use with a multiproce...

Dedicated centralized signaling mechanism for selectively signaling...

System for communicating among processors having different speeds

Cluster architecture for a highly parallel scalar/vector multiproce...

Fast interrupt mechanism for interrupting processors in parallel in...

System and method for controlling a highly parallel multiprocessor...

Distributed architecture for input/output for a multiprocessor system

Global registers for a multiprocessor system