Glen L. Miles

Person

Essex Junction, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Arranging through silicon vias in IC layout
- Patent number 8,136,084
- Issue date Mar 13, 2012
- International Business Machines Corporation
- Donald R. Dean, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS transistor with a polysilicon gate electrode having varying gr...
- Patent number 7,714,366
- Issue date May 11, 2010
- International Business Machines Corporation
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing polysilicon depletion in a polysilicon gate elec...
- Patent number 6,893,948
- Issue date May 17, 2005
- International Business Machines Corporation
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for formation of a blocked silicide resistor
- Patent number 6,853,032
- Issue date Feb 8, 2005
- International Business Machines Corporation
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing polysilicon depletion in a polysilicon gate elec...
- Patent number 6,670,263
- Issue date Dec 30, 2003
- International Business Machines Corporation
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for formation of a blocked silicide resistor
- Patent number 6,660,664
- Issue date Dec 9, 2003
- International Business Machines Corp.
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing a contact barrier
- Patent number 6,509,265
- Issue date Jan 21, 2003
- International Business Machines Corporation
- Patrick W. DeHaven
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modification of the wet characteristics of deposited layers and in-...
- Patent number 6,348,419
- Issue date Feb 19, 2002
- Infineon Technologies AG
- Frank Grellner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for temperature measurement using dopant segregation into ti...
- Patent number 6,250,803
- Issue date Jun 26, 2001
- International Business Machines Corporation
- Arne W. Ballantine
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor structure having reduced silicide resistance between...
- Patent number 6,235,597
- Issue date May 22, 2001
- International Business Machines Corporation
- Glen L. Miles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature formation of low resistivity titanium silicide
- Patent number 6,187,679
- Issue date Feb 13, 2001
- International Business Machines Corporation
- Cyril Cabral
- C30 - CRYSTAL GROWTH
Information Patent Grant
Process for manufacturing a contact barrier
- Patent number 6,180,521
- Issue date Jan 30, 2001
- International Business Machines Corporation
- Patrick W. DeHaven
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Triple polysilicon embedded NVRAM cell and method thereof
- Patent number 6,180,456
- Issue date Jan 30, 2001
- International Business Machines Corporation
- Chung Hon Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating a floating gate with field enhancement feature self-ali...
- Patent number 6,069,040
- Issue date May 30, 2000
- International Business Machines Corporation
- Glen L. Miles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene NVRAM cell and method of manufacture
- Patent number 6,060,358
- Issue date May 9, 2000
- International Business Machines Corporation
- John A. Bracchitta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature formation of low resistivity titanium silicide
- Patent number 5,828,131
- Issue date Oct 27, 1998
- International Business Machines Corporation
- Cyril Cabral
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method for lowering the phase transformation temperature of a metal...
- Patent number 5,510,295
- Issue date Apr 23, 1996
- International Business Machines Corporation
- Cyril Cabral
- C30 - CRYSTAL GROWTH
Information Patent Grant
Silicide bridge contact process
- Patent number 4,983,544
- Issue date Jan 8, 1991
- International Business Machines Corporation
- Nicky C. Lu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ARRANGING THROUGH SILICON VIAS IN IC LAYOUT
- Publication number 20110057319
- Publication date Mar 10, 2011
- International Business Machines Corporation
- Donald R. Dean, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CMOS TRANSISTOR WITH A POLYSILICON GATE ELECTRODE HAVING VARYING GR...
- Publication number 20050110096
- Publication date May 26, 2005
- International Business Machines Corporation
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for formation of a blocked silicide resistor
- Publication number 20040135214
- Publication date Jul 15, 2004
- International Business Machines Corporation
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of reducing polysilicon depletion in a polysilicon gate elec...
- Publication number 20040023476
- Publication date Feb 5, 2004
- International Business Machines
- Arne W. Ballantine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for utilizing tungsten barrier in contacts to silicide and s...
- Publication number 20020175413
- Publication date Nov 28, 2002
- International Business Machines Corporation
- Louis D. Lanzerotti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure having reduced silicide resistance between...
- Publication number 20010009291
- Publication date Jul 26, 2001
- International Business Machines Corporation
- Glen L. Miles
- H01 - BASIC ELECTRIC ELEMENTS

Glen L. Miles

Person

Patents Grantslast 30 patents

Arranging through silicon vias in IC layout

CMOS transistor with a polysilicon gate electrode having varying gr...

Method of reducing polysilicon depletion in a polysilicon gate elec...

Structure and method for formation of a blocked silicide resistor

Method of reducing polysilicon depletion in a polysilicon gate elec...

Structure and method for formation of a blocked silicide resistor

Process for manufacturing a contact barrier

Modification of the wet characteristics of deposited layers and in-...

Method for temperature measurement using dopant segregation into ti...

Semiconductor structure having reduced silicide resistance between...

Low temperature formation of low resistivity titanium silicide

Process for manufacturing a contact barrier

Triple polysilicon embedded NVRAM cell and method thereof

Fabricating a floating gate with field enhancement feature self-ali...

Damascene NVRAM cell and method of manufacture

Low temperature formation of low resistivity titanium silicide

Method for lowering the phase transformation temperature of a metal...

Silicide bridge contact process

Patents Applicationslast 30 patents

ARRANGING THROUGH SILICON VIAS IN IC LAYOUT

CMOS TRANSISTOR WITH A POLYSILICON GATE ELECTRODE HAVING VARYING GR...

Structure and method for formation of a blocked silicide resistor

Method of reducing polysilicon depletion in a polysilicon gate elec...

Method for utilizing tungsten barrier in contacts to silicide and s...

Semiconductor structure having reduced silicide resistance between...