Harold S. Crafts

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Sea-of-cells array of transistors
- Patent number 7,257,779
- Issue date Aug 14, 2007
- Magnachip Semiconductor, Ltd.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sea-of-cells array of transistors
- Patent number 7,207,025
- Issue date Apr 17, 2007
- Magnachip Semiconductor, Ltd.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sea-of-cells array of transistors
- Patent number 6,977,399
- Issue date Dec 20, 2005
- Hynix Semiconductor Inc.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sea-of-cells array of transistors
- Patent number 6,967,361
- Issue date Nov 22, 2005
- MagnaChip Semiconductor, Ltd.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for data dependent, dual level output driver
- Patent number 6,801,969
- Issue date Oct 5, 2004
- LSI Logic Corporation
- Harold S. Crafts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of constructing an integrated circuit comprising an embedded...
- Patent number 6,675,361
- Issue date Jan 6, 2004
- Hyundai Electronics America
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming sea-of-cells array of transistors
- Patent number 6,605,499
- Issue date Aug 12, 2003
- Hyundai Electronics America, Inc.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for data dependent, dual level output driver
- Patent number 6,557,066
- Issue date Apr 29, 2003
- LSI Logic Corporation
- Harold S. Crafts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sea-of-cells array of transistors
- Patent number 6,489,641
- Issue date Dec 3, 2002
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for self correcting parallel I/O circuitry
- Patent number 6,294,937
- Issue date Sep 25, 2001
- LSI Logic Corporation
- Harold S. Crafts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of constructing an integrated circuit utilizing multiple lay...
- Patent number 6,269,466
- Issue date Jul 31, 2001
- Hyundai Electronics America
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM with built-in noise protection
- Patent number 6,180,998
- Issue date Jan 30, 2001
- LSI Logic Corporation
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded dram with noise-protected differential capacitor memory cells
- Patent number 6,064,588
- Issue date May 16, 2000
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Inherently compensated clocking circuit for dynamic random access m...
- Patent number 6,005,824
- Issue date Dec 21, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded DRAM with noise-protecting substrate isolation well
- Patent number 5,999,440
- Issue date Dec 7, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical, adaptable-configuration dynamic random access memory
- Patent number 5,978,304
- Issue date Nov 2, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded DRAM with noise protecting shielding conductor
- Patent number 5,973,952
- Issue date Oct 26, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Antifuse device for use on a field programmable interconnect chip
- Patent number 5,920,110
- Issue date Jul 6, 1999
- LSI Logic Corporation
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically selectable redundant components for an embedded DRAM
- Patent number 5,907,511
- Issue date May 25, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Reprogrammable address selector for an embedded DRAM
- Patent number 5,901,095
- Issue date May 4, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Reprogrammable addressing process for embedded DRAM
- Patent number 5,896,331
- Issue date Apr 20, 1999
- LSI Logic Corporation
- Harold S. Crafts
- G11 - INFORMATION STORAGE
Information Patent Grant
Sea-of-cells array of transistors
- Patent number 5,869,900
- Issue date Feb 9, 1999
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antifuse device for use on a field programmable interconnect chip
- Patent number 5,844,297
- Issue date Dec 1, 1998
- Symbios, Inc.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor fuse structure
- Patent number 5,759,877
- Issue date Jun 2, 1998
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sea-of-cells array of transistors
- Patent number 5,671,397
- Issue date Sep 23, 1997
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential analog transistors constructed from digital transistors
- Patent number 5,610,429
- Issue date Mar 11, 1997
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Analog output driver for gate arrays
- Patent number 5,541,548
- Issue date Jul 30, 1996
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polysilicon fuse array structure for integrated circuits
- Patent number 5,536,968
- Issue date Jul 16, 1996
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for calculating dynamic power dissipation in C...
- Patent number 5,521,834
- Issue date May 28, 1996
- AT&T Global Information Solutions Company
- Harold S. Crafts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-chip module packaging system
- Patent number 5,497,027
- Issue date Mar 5, 1996
- AT&T Global Information Solutions Company
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Sea-of-cells array of transistors
- Publication number 20040078769
- Publication date Apr 22, 2004
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sea-of-cells array of transistors
- Publication number 20040039998
- Publication date Feb 26, 2004
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sea-of-cells array of transistors
- Publication number 20040005738
- Publication date Jan 8, 2004
- Hyundai Electronics America
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for data dependent, dual level output driver
- Publication number 20030046598
- Publication date Mar 6, 2003
- Harold S. Crafts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sea-of-cells array of transistors
- Publication number 20020153574
- Publication date Oct 24, 2002
- Hynix Semiconductor Inc.
- Harold S. Crafts
- H01 - BASIC ELECTRIC ELEMENTS

Harold S. Crafts

Person

Patents Grantslast 30 patents

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Method and apparatus for data dependent, dual level output driver

Method of constructing an integrated circuit comprising an embedded...

Method of forming sea-of-cells array of transistors

Method and apparatus for data dependent, dual level output driver

Sea-of-cells array of transistors

Method and apparatus for self correcting parallel I/O circuitry

Method of constructing an integrated circuit utilizing multiple lay...

DRAM with built-in noise protection

Embedded dram with noise-protected differential capacitor memory cells

Inherently compensated clocking circuit for dynamic random access m...

Embedded DRAM with noise-protecting substrate isolation well

Hierarchical, adaptable-configuration dynamic random access memory

Embedded DRAM with noise protecting shielding conductor

Antifuse device for use on a field programmable interconnect chip

Electrically selectable redundant components for an embedded DRAM

Reprogrammable address selector for an embedded DRAM

Reprogrammable addressing process for embedded DRAM

Sea-of-cells array of transistors

Antifuse device for use on a field programmable interconnect chip

Semiconductor fuse structure

Sea-of-cells array of transistors

Differential analog transistors constructed from digital transistors

Analog output driver for gate arrays

Polysilicon fuse array structure for integrated circuits

Method and apparatus for calculating dynamic power dissipation in C...

Multi-chip module packaging system

Patents Applicationslast 30 patents

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Method and apparatus for data dependent, dual level output driver

Sea-of-cells array of transistors