Hiroki Tanaka

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Embedded faraday rotators and components for increasing bandwidth a...
- Patent number 12,368,511
- Issue date Jul 22, 2025
- Intel Corporation
- Brandon C. Marin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 12,354,963
- Issue date Jul 8, 2025
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Glass interposer optical switching device and method
- Patent number 12,353,070
- Issue date Jul 8, 2025
- Intel Corporation
- Hiroki Tanaka
- G02 - OPTICS
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 12,334,443
- Issue date Jun 17, 2025
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Glass interposer optical resonator device and method
- Patent number 12,306,480
- Issue date May 20, 2025
- Intel Corporation
- Hiroki Tanaka
- G02 - OPTICS
Information Patent Grant
Converting multiple light signals into and out of a single waveleng...
- Patent number 12,282,174
- Issue date Apr 22, 2025
- Intel Corporation
- Kaveh Hosseini
- G02 - OPTICS
Information Patent Grant
Magneto-optical Kerr effect interconnects for photonic packaging
- Patent number 12,253,722
- Issue date Mar 18, 2025
- Intel Corporation
- Hiroki Tanaka
- G02 - OPTICS
Information Patent Grant
Subtractive etch resolution implementing a functional thin metal re...
- Patent number 11,948,848
- Issue date Apr 2, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishes with low RBTV for fine and mixed bump pitch archit...
- Patent number 11,935,857
- Issue date Mar 19, 2024
- Intel Corporation
- Kristof Darmawaikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 11,929,330
- Issue date Mar 12, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial dielectric for lithographic via formation to enable via...
- Patent number 11,908,821
- Issue date Feb 20, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patch accommodating embedded dies having different thicknesses
- Patent number 11,862,619
- Issue date Jan 2, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitors with nanoislands on conductive plates
- Patent number 11,855,125
- Issue date Dec 26, 2023
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,721,631
- Issue date Aug 8, 2023
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromigration resistant and profile consistent contact arrays
- Patent number 11,699,648
- Issue date Jul 11, 2023
- Tahoe Research, LTD.
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via-trace structures
- Patent number 11,652,036
- Issue date May 16, 2023
- Santa Clara
- Jeremy Ecton
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Package architecture utilizing photoimageable dielectric (PID) for...
- Patent number 11,574,874
- Issue date Feb 7, 2023
- Intel Corporation
- Robert A. May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishes with low rBTV for fine and mixed bump pitch archit...
- Patent number 11,488,918
- Issue date Nov 1, 2022
- Intel Corporation
- Kristof Darmawaikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,373,951
- Issue date Jun 28, 2022
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 11,322,444
- Issue date May 3, 2022
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromigration resistant and profile consistent contact arrays
- Patent number 11,309,239
- Issue date Apr 19, 2022
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial dielectric for lithographic via formation to enable via...
- Patent number 11,264,346
- Issue date Mar 1, 2022
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-damascene zero-misalignment-via process for semiconductor pack...
- Patent number 11,264,307
- Issue date Mar 1, 2022
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polarization defined zero misalignment vias for semiconductor packa...
- Patent number 11,264,239
- Issue date Mar 1, 2022
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromigration resistant and profile consistent contact arrays
- Patent number 10,854,541
- Issue date Dec 1, 2020
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polarization defined zero misalignment vias for semiconductor packa...
- Patent number 10,453,812
- Issue date Oct 22, 2019
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromigration resistant and profile consistent contact arrays
- Patent number 10,431,537
- Issue date Oct 1, 2019
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-damascene zero-misalignment-via process for semiconductor pack...
- Patent number 10,403,564
- Issue date Sep 3, 2019
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package substrate first-level-interconnect architecture
- Patent number 10,121,679
- Issue date Nov 6, 2018
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TECHNOLOGIES FOR POWER AND SPACER COMPONENTS EMBEDDED IN A SUBSTRAT...
- Publication number 20250218904
- Publication date Jul 3, 2025
- Intel Corporation
- Ziyin Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY EMBEDDED COMPONENTS IN PACKAGE SUBSTRATES
- Publication number 20250219021
- Publication date Jul 3, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO EMBED SEMICONDUCTOR DEVICES IN CORES OF PA...
- Publication number 20250218960
- Publication date Jul 3, 2025
- Intel Corporation
- Clay Bradley Arrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE AND CONDUCTIVE VIAS EMBEDDED IN A SUBSTRATE
- Publication number 20250218963
- Publication date Jul 3, 2025
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PASSIVE COMPONENT ASSEMBLY FOR THICKNESS MODIFICATION TO MATCH CORE...
- Publication number 20250218999
- Publication date Jul 3, 2025
- Intel Corporation
- Bohan SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEP TRENCH CAPACITORS IN MULTI-CORE INTEGRATED CIRCUIT DEVICE PACK...
- Publication number 20250219028
- Publication date Jul 3, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PEDESTAL STRUCTURE FOR PASSIVE CIRCUIT COMPONENT STRUCTURE
- Publication number 20250218915
- Publication date Jul 3, 2025
- Intel Corporation
- Tolga Acikalin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE WITHIN A HOLE IN A SUBSTRATE CORE ATTACHED TO METAL FEATURES OV...
- Publication number 20250218678
- Publication date Jul 3, 2025
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR CONNECTED COMPONENTS EMBEDDED IN A SUBSTRATE CORE
- Publication number 20250218964
- Publication date Jul 3, 2025
- Intel Corporation
- Kyle J. Arrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESIST TENTING AND PLATING IN CORE CAVITY FOR COMPONENT ATTACHMENT
- Publication number 20250218879
- Publication date Jul 3, 2025
- Intel Corporation
- Hiroki TANAKA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH STRENGTHENED GLASS CORES
- Publication number 20250210426
- Publication date Jun 26, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY EMBEDDED PRE-FORMED DEEP TRENCH CAPACITOR MODULES
- Publication number 20250201485
- Publication date Jun 19, 2025
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH PRE-SINGULATION EDGE FEATURES IN GL...
- Publication number 20250192069
- Publication date Jun 12, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH POST-SINGULATION EDGE FEATURES IN G...
- Publication number 20250192070
- Publication date Jun 12, 2025
- Intel Corporation
- Jesse C. Jones
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT BONDING FOR EMBEDDED BRIDGES WITH VIAS
- Publication number 20250183180
- Publication date Jun 5, 2025
- Intel Corporation
- Brandon C. MARIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POROUS LINERS FOR THROUGH-GLASS VIAS AND ASSOCIATED METHODS
- Publication number 20250132239
- Publication date Apr 24, 2025
- Intel Corporation
- Hongxia Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
- Publication number 20250126814
- Publication date Apr 17, 2025
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
- Publication number 20250125201
- Publication date Apr 17, 2025
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
- Publication number 20250125202
- Publication date Apr 17, 2025
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES
- Publication number 20250120102
- Publication date Apr 10, 2025
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY
- Publication number 20250112100
- Publication date Apr 3, 2025
- Intel Corporation
- Robert May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS
- Publication number 20250112136
- Publication date Apr 3, 2025
- Intel Corporation
- Bohan SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANISOTROPIC CONDUCTIVE CONNECTIONS FOR INTERCONNECT BRIDGES AND REL...
- Publication number 20250112165
- Publication date Apr 3, 2025
- Intel Corporation
- Brandon Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH GLASS VIA (TGV) WITH MODULATED PROFILE FOR CORE STRESS REDU...
- Publication number 20250113434
- Publication date Apr 3, 2025
- Intel Corporation
- Bai NIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS CORES INCLUDING PROTRUDING THROUGH GLASS VIAS AND RELATED MET...
- Publication number 20250105074
- Publication date Mar 27, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW STRESS THROUGH GLASS VIAS (TGVS)
- Publication number 20250089156
- Publication date Mar 13, 2025
- Intel Corporation
- Mohamed R. SABER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR EDGE PROTECTED GLASS CORES
- Publication number 20250022786
- Publication date Jan 16, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE UNDERCUT FOR GLASS CORE SUBSTRATE BRIDGE FIRST LEVEL INTE...
- Publication number 20240355751
- Publication date Oct 24, 2024
- Intel Corporation
- Sanjay THARMARAJAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AIR-GAP TRACES AND AIR-GAP EMBEDDED BRIDGE INTEGRATED IN GLASS INTE...
- Publication number 20240339381
- Publication date Oct 10, 2024
- Intel Corporation
- Hiroki TANAKA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING REPLACEABLE FIBER CO...
- Publication number 20240329339
- Publication date Oct 3, 2024
- Intel Corporation
- Jeremy Ecton
- G02 - OPTICS

Hiroki Tanaka

Person

Patents Grantslast 30 patents

Embedded faraday rotators and components for increasing bandwidth a...

Lithographic cavity formation to enable EMIB bump pitch scaling

Glass interposer optical switching device and method

Lithographic cavity formation to enable EMIB bump pitch scaling

Glass interposer optical resonator device and method

Converting multiple light signals into and out of a single waveleng...

Magneto-optical Kerr effect interconnects for photonic packaging

Subtractive etch resolution implementing a functional thin metal re...

Surface finishes with low RBTV for fine and mixed bump pitch archit...

Lithographic cavity formation to enable EMIB bump pitch scaling

Sacrificial dielectric for lithographic via formation to enable via...

Patch accommodating embedded dies having different thicknesses

Capacitors with nanoislands on conductive plates

Via structures having tapered profiles for embedded interconnect br...

Electromigration resistant and profile consistent contact arrays

Via-trace structures

Package architecture utilizing photoimageable dielectric (PID) for...

Surface finishes with low rBTV for fine and mixed bump pitch archit...

Via structures having tapered profiles for embedded interconnect br...

Lithographic cavity formation to enable EMIB bump pitch scaling

Electromigration resistant and profile consistent contact arrays

Sacrificial dielectric for lithographic via formation to enable via...

Dual-damascene zero-misalignment-via process for semiconductor pack...

Polarization defined zero misalignment vias for semiconductor packa...

Electromigration resistant and profile consistent contact arrays

Polarization defined zero misalignment vias for semiconductor packa...

Electromigration resistant and profile consistent contact arrays

Dual-damascene zero-misalignment-via process for semiconductor pack...

Package substrate first-level-interconnect architecture

Patents Applicationslast 30 patents

TECHNOLOGIES FOR POWER AND SPACER COMPONENTS EMBEDDED IN A SUBSTRAT...

VERTICALLY EMBEDDED COMPONENTS IN PACKAGE SUBSTRATES

METHODS AND APPARATUS TO EMBED SEMICONDUCTOR DEVICES IN CORES OF PA...

DIE AND CONDUCTIVE VIAS EMBEDDED IN A SUBSTRATE

PASSIVE COMPONENT ASSEMBLY FOR THICKNESS MODIFICATION TO MATCH CORE...

DEEP TRENCH CAPACITORS IN MULTI-CORE INTEGRATED CIRCUIT DEVICE PACK...

PEDESTAL STRUCTURE FOR PASSIVE CIRCUIT COMPONENT STRUCTURE

DIE WITHIN A HOLE IN A SUBSTRATE CORE ATTACHED TO METAL FEATURES OV...

TECHNOLOGIES FOR CONNECTED COMPONENTS EMBEDDED IN A SUBSTRATE CORE

RESIST TENTING AND PLATING IN CORE CAVITY FOR COMPONENT ATTACHMENT

MICROELECTRONIC ASSEMBLIES WITH STRENGTHENED GLASS CORES

VERTICALLY EMBEDDED PRE-FORMED DEEP TRENCH CAPACITOR MODULES

MICROELECTRONIC ASSEMBLIES WITH PRE-SINGULATION EDGE FEATURES IN GL...

MICROELECTRONIC ASSEMBLIES WITH POST-SINGULATION EDGE FEATURES IN G...

DIRECT BONDING FOR EMBEDDED BRIDGES WITH VIAS

POROUS LINERS FOR THROUGH-GLASS VIAS AND ASSOCIATED METHODS

PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES

PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES

PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES

PACKAGE SUBSTRATES WITH COMPONENTS INCLUDED IN CAVITIES OF GLASS CORES

DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY

GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS

ANISOTROPIC CONDUCTIVE CONNECTIONS FOR INTERCONNECT BRIDGES AND REL...

THROUGH GLASS VIA (TGV) WITH MODULATED PROFILE FOR CORE STRESS REDU...

GLASS CORES INCLUDING PROTRUDING THROUGH GLASS VIAS AND RELATED MET...

LOW STRESS THROUGH GLASS VIAS (TGVS)

METHODS AND APPARATUS FOR EDGE PROTECTED GLASS CORES

SELECTIVE UNDERCUT FOR GLASS CORE SUBSTRATE BRIDGE FIRST LEVEL INTE...

AIR-GAP TRACES AND AIR-GAP EMBEDDED BRIDGE INTEGRATED IN GLASS INTE...

PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING REPLACEABLE FIBER CO...