Howard C. Kirsch

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Switch level simulation with cross-coupled devices
- Patent number 6,408,264
- Issue date Jun 18, 2002
- Vanguard International Semiconductor-America
- Jason Tzu-Jung Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local bit switch decode circuit and method
- Patent number 6,327,215
- Issue date Dec 4, 2001
- Vanguard International Semiconductor Corporation
- Luigi Ternullo
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple-bit, current mode data bus
- Patent number 6,320,417
- Issue date Nov 20, 2001
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple-bit, current mode data bus
- Patent number 6,300,795
- Issue date Oct 9, 2001
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple-bit, current mode data bus
- Patent number 6,275,067
- Issue date Aug 14, 2001
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple-bit, current mode data bus
- Patent number 6,184,714
- Issue date Feb 6, 2001
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Schmitt trigger input stage
- Patent number 6,091,264
- Issue date Jul 18, 2000
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Design for high density memory with relaxed metal pitch
- Patent number 6,057,573
- Issue date May 2, 2000
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Word line resistance reduction method and design for high density m...
- Patent number 5,933,725
- Issue date Aug 3, 1999
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local word line decoder for memory with 2 1/2 MOS devices
- Patent number 5,896,344
- Issue date Apr 20, 1999
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Local word line decoder for memory with 2 MOS devices
- Patent number 5,867,445
- Issue date Feb 2, 1999
- Vanguard International Semiconductor Corporation
- Howard C. Kirsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having a static-random-access memory cell
- Patent number 5,739,564
- Issue date Apr 14, 1998
- Motorola, Inc.
- Yasunobu Kosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically programmable read-only memory cell
- Patent number 5,616,941
- Issue date Apr 1, 1997
- Motorola Inc.
- Scott S. Roth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BicMOS device having a bipolar transistor and a MOS triggering tran...
- Patent number 5,578,856
- Issue date Nov 26, 1996
- Motorola Inc.
- Ravi Subrahmanyan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming an electrically programmable read-only memory cell
- Patent number 5,543,339
- Issue date Aug 6, 1996
- Motorola, Inc.
- Scott S. Roth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming a static-random-access memory cell
- Patent number 5,536,674
- Issue date Jul 16, 1996
- Motorola, Inc.
- Yasunobu Kosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a nonvolatile memory device
- Patent number 5,496,756
- Issue date Mar 5, 1996
- Motorola Inc.
- Umesh Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensionally integrated nonvolatile SRAM cell and process
- Patent number 5,488,579
- Issue date Jan 30, 1996
- Motorola Inc.
- Umesh Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making BIMOS device having a bipolar transistor and a MO...
- Patent number 5,459,083
- Issue date Oct 17, 1995
- Motorola, Inc.
- Ravi Subrahmanyan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of formation
- Patent number 5,445,107
- Issue date Aug 29, 1995
- Motorola, Inc.
- Scott S. Roth
- C30 - CRYSTAL GROWTH
Information Patent Grant
Ferroelectric memory cell and method of sensing and writing the pol...
- Patent number 5,432,731
- Issue date Jul 11, 1995
- Motorola, Inc.
- Howard C. Kirsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical field-effect transistor and a semiconductor memory cell ha...
- Patent number 5,416,736
- Issue date May 16, 1995
- Motorola, Inc.
- Yasunobu Kosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection structure for conductive layers
- Patent number 5,408,130
- Issue date Apr 18, 1995
- Motorola, Inc.
- Michael P. Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a self-aligned thin film transistor
- Patent number 5,374,573
- Issue date Dec 20, 1994
- Motorola, Inc.
- Kent J. Cooper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a vertical field-effect transistor and a semicon...
- Patent number 5,364,810
- Issue date Nov 15, 1994
- Motorola, Inc.
- Yasunobu Kosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned thin film transistor
- Patent number 5,308,997
- Issue date May 3, 1994
- Motorola, Inc.
- Kent J. Cooper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a via structure and semiconductor device having...
- Patent number 5,286,674
- Issue date Feb 15, 1994
- Motorola, Inc.
- Scott S. Roth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for planarizing a layer of material
- Patent number 5,272,117
- Issue date Dec 21, 1993
- Motorola, Inc.
- Scott S. Roth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a nested surface capacitor
- Patent number 5,266,512
- Issue date Nov 30, 1993
- Motorola, Inc.
- Howard C. Kirsch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming an interconnection structure for conductive layers
- Patent number 5,262,352
- Issue date Nov 16, 1993
- Motorola, Inc.
- Michael P. Woo
- H01 - BASIC ELECTRIC ELEMENTS

Howard C. Kirsch

Person

Patents Grantslast 30 patents

Switch level simulation with cross-coupled devices

Local bit switch decode circuit and method

Multiple-bit, current mode data bus

Multiple-bit, current mode data bus

Multiple-bit, current mode data bus

Multiple-bit, current mode data bus

Schmitt trigger input stage

Design for high density memory with relaxed metal pitch

Word line resistance reduction method and design for high density m...

Local word line decoder for memory with 2 1/2 MOS devices

Local word line decoder for memory with 2 MOS devices

Semiconductor device having a static-random-access memory cell

Electrically programmable read-only memory cell

BicMOS device having a bipolar transistor and a MOS triggering tran...

Process for forming an electrically programmable read-only memory cell

Process for forming a static-random-access memory cell

Method for forming a nonvolatile memory device

Three-dimensionally integrated nonvolatile SRAM cell and process

Method for making BIMOS device having a bipolar transistor and a MO...

Semiconductor device and method of formation

Ferroelectric memory cell and method of sensing and writing the pol...

Vertical field-effect transistor and a semiconductor memory cell ha...

Interconnection structure for conductive layers

Method of forming a self-aligned thin film transistor

Methods of forming a vertical field-effect transistor and a semicon...

Self-aligned thin film transistor

Method for forming a via structure and semiconductor device having...

Method for planarizing a layer of material

Method for forming a nested surface capacitor

Method for forming an interconnection structure for conductive layers