Hsin-Jung Lo

Person

Taipei County, TW

People

Patents Grantslast 30 patents

Information Patent Grant
3D chip package based on vertical-through-via connector
- Patent number 12,176,278
- Issue date Dec 24, 2024
- iCometrue Company Ltd.
- Ping-Jung Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit chip using top post-passivation technology and b...
- Patent number 9,612,615
- Issue date Apr 4, 2017
- QUALCOMM Incorporated
- Mou-Shiung Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Waveguide structures for signal and/or power transmission in a semi...
- Patent number 8,837,872
- Issue date Sep 16, 2014
- QUALCOMM Incorporated
- Ping-Jung Yang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Chip package and method for fabricating the same
- Patent number 8,836,146
- Issue date Sep 16, 2014
- QUALCOMM Incorporated
- Chien-Kang Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Carbon nanotube circuit component structure
- Patent number 8,692,374
- Issue date Apr 8, 2014
- Megit Acquisition Corp.
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Digital camera and operating method thereof
- Patent number 8,531,573
- Issue date Sep 10, 2013
- Inventec Appliances (Shanghai) Co. Ltd.
- Hsin-Ran Lo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit chip using top post-passivation technology and b...
- Patent number 8,456,856
- Issue date Jun 4, 2013
- Megica Corporation
- Mou-Shiung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked chip package with redistribution lines
- Patent number 8,426,958
- Issue date Apr 23, 2013
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal pad or metal bump over pad exposed by passivation layer
- Patent number 8,399,989
- Issue date Mar 19, 2013
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package
- Patent number 8,368,193
- Issue date Feb 5, 2013
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire bonding method for preventing polymer cracking
- Patent number 8,344,524
- Issue date Jan 1, 2013
- Megica Corporation
- Chiu-Ming Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with post-passivation scheme formed over passiva...
- Patent number 8,319,354
- Issue date Nov 27, 2012
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with a bonding pad having contact and test areas
- Patent number 8,304,766
- Issue date Nov 6, 2012
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of bonding circuitry components
- Patent number 8,232,192
- Issue date Jul 31, 2012
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip assembly with interconnection by metal bump
- Patent number 8,193,636
- Issue date Jun 5, 2012
- Megica Corporation
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip structure
- Patent number 8,159,074
- Issue date Apr 17, 2012
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding pad on IC substrate and method for making the same
- Patent number 8,148,822
- Issue date Apr 3, 2012
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light projecting apparatus of scanner module
- Patent number 8,056,807
- Issue date Nov 15, 2011
- Teco Image System Co., Ltd.
- Hsin-Pao Lo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Chip package
- Patent number 8,044,475
- Issue date Oct 25, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with post-passivation scheme formed over passiva...
- Patent number 8,004,092
- Issue date Aug 23, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Carbon nanotube circuit component structure
- Patent number 7,990,037
- Issue date Aug 2, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked chip package with redistribution lines
- Patent number 7,973,401
- Issue date Jul 5, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package
- Patent number 7,964,961
- Issue date Jun 21, 2011
- Megica Corporation
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip structure
- Patent number 7,964,973
- Issue date Jun 21, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a double embossing structure
- Patent number 7,960,269
- Issue date Jun 14, 2011
- Megica Corporation
- Hsin-Jung Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with bond area
- Patent number 7,947,978
- Issue date May 24, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip and process for forming the same
- Patent number 7,932,172
- Issue date Apr 26, 2011
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked chip package with redistribution lines
- Patent number 7,508,059
- Issue date Mar 24, 2009
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package
- Patent number 7,495,304
- Issue date Feb 24, 2009
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip and process for forming the same
- Patent number 7,473,999
- Issue date Jan 6, 2009
- Megica Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
3D CHIP PACKAGE BASED ON VERTICAL-THROUGH-VIA CONNECTOR
- Publication number 20220384326
- Publication date Dec 1, 2022
- iCometrue Company Ltd.
- Ping-Jung Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND B...
- Publication number 20130242500
- Publication date Sep 19, 2013
- MEGICA Corporation
- Mou-Shiung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multichip Packages
- Publication number 20120193785
- Publication date Aug 2, 2012
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAVEGUIDE STRUCTURES FOR SIGNAL AND/OR POWER TRANSMISSION IN A SEMI...
- Publication number 20120170887
- Publication date Jul 5, 2012
- MEGICA CORPORATION
- Ping-Jung Yang
- G02 - OPTICS
Information Patent Application
CHIP PACKAGE
- Publication number 20120007237
- Publication date Jan 12, 2012
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CARBON NANOTUBE CIRCUIT COMPONENT STRUCTURE
- Publication number 20110266680
- Publication date Nov 3, 2011
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP WITH POST-PASSIVATION SCHEME FORMED OVER PASSIVA...
- Publication number 20110266669
- Publication date Nov 3, 2011
- MEGICA CORPORATION
- Chiu-Ming Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED CHIP PACKAGE WITH REDISTRIBUTION LINES
- Publication number 20110241183
- Publication date Oct 6, 2011
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A DOUBLE EMBOSSING STRUCTURE
- Publication number 20110215469
- Publication date Sep 8, 2011
- MEGICA Corporation
- HSIN-JUNG LO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE
- Publication number 20110210441
- Publication date Sep 1, 2011
- MEGICA CORPORATION
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP STRUCTURE AND METHOD FOR FABRICATING THE SAME
- Publication number 20110204510
- Publication date Aug 25, 2011
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP
- Publication number 20110198589
- Publication date Aug 18, 2011
- MEGICA Corporation
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIGITAL CAMERA AND OPERATING METHOD THEREOF
- Publication number 20110176039
- Publication date Jul 21, 2011
- INVENTEC APPLIANCES (SHANGHAI) CO. LTD.
- HSIN-RAN LO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND B...
- Publication number 20100246152
- Publication date Sep 30, 2010
- MEGICA Corporation
- Mou-Shiung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LIGHT PROJECTING APPARATUS OF SCANNER MODULE
- Publication number 20100123008
- Publication date May 20, 2010
- TECO IMAGE SYSTEM CO., LTD
- Hsin-Pao LO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Chip Package
- Publication number 20090121302
- Publication date May 14, 2009
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP STRUCTURE AND METHOD FOR FABRICATING THE SAME
- Publication number 20090108453
- Publication date Apr 30, 2009
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP AND PROCESS FOR FORMING THE SAME
- Publication number 20090065871
- Publication date Mar 12, 2009
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Chip Package With Redistribution Lines
- Publication number 20090057900
- Publication date Mar 5, 2009
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP ASSEMBLY
- Publication number 20080284014
- Publication date Nov 20, 2008
- MEGICA CORPORATION
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP WITH POST-PASSIVATION SCHEME FORMED OVER PASSIVA...
- Publication number 20080265413
- Publication date Oct 30, 2008
- MEGICA CORPORATION
- Chiu-Ming Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE
- Publication number 20080251940
- Publication date Oct 16, 2008
- MEGICA CORPORATION
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP STRUCTURE AND METHOD FOR FABRICATION THE SAME
- Publication number 20080146018
- Publication date Jun 19, 2008
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BONDING METHOD FOR PREVENTING POLYMER CRACKING
- Publication number 20070212869
- Publication date Sep 13, 2007
- Chiu-Ming Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME
- Publication number 20070205520
- Publication date Sep 6, 2007
- MEGICA CORPORATION
- Chien-Kang Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP
- Publication number 20070164279
- Publication date Jul 19, 2007
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CARBON NANOTUBE CIRCUIT COMPONENT STRUCTURE
- Publication number 20070164430
- Publication date Jul 19, 2007
- MEGICA CORPORATION
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor chip with post-passivation scheme formed over passiva...
- Publication number 20070096313
- Publication date May 3, 2007
- MEGIC Corporation
- Chiu-Ming Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP AND PROCESS FOR FORMING THE SAME
- Publication number 20070069347
- Publication date Mar 29, 2007
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a double embossing structure
- Publication number 20070045855
- Publication date Mar 1, 2007
- MEGICA Corporation
- Hsin-Jung Lo
- H01 - BASIC ELECTRIC ELEMENTS

Hsin-Jung Lo

Person

Patents Grantslast 30 patents

3D chip package based on vertical-through-via connector

Integrated circuit chip using top post-passivation technology and b...

Waveguide structures for signal and/or power transmission in a semi...

Chip package and method for fabricating the same

Carbon nanotube circuit component structure

Digital camera and operating method thereof

Integrated circuit chip using top post-passivation technology and b...

Stacked chip package with redistribution lines

Metal pad or metal bump over pad exposed by passivation layer

Chip package

Wire bonding method for preventing polymer cracking

Semiconductor chip with post-passivation scheme formed over passiva...

Semiconductor chip with a bonding pad having contact and test areas

Process of bonding circuitry components

Chip assembly with interconnection by metal bump

Chip structure

Bonding pad on IC substrate and method for making the same

Light projecting apparatus of scanner module

Chip package

Semiconductor chip with post-passivation scheme formed over passiva...

Carbon nanotube circuit component structure

Stacked chip package with redistribution lines

Chip package

Chip structure

Method for forming a double embossing structure

Semiconductor chip with bond area

Semiconductor chip and process for forming the same

Stacked chip package with redistribution lines

Chip package

Semiconductor chip and process for forming the same

Patents Applicationslast 30 patents

3D CHIP PACKAGE BASED ON VERTICAL-THROUGH-VIA CONNECTOR

INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND B...

Multichip Packages

WAVEGUIDE STRUCTURES FOR SIGNAL AND/OR POWER TRANSMISSION IN A SEMI...

CHIP PACKAGE

CARBON NANOTUBE CIRCUIT COMPONENT STRUCTURE

SEMICONDUCTOR CHIP WITH POST-PASSIVATION SCHEME FORMED OVER PASSIVA...

STACKED CHIP PACKAGE WITH REDISTRIBUTION LINES

METHOD FOR FORMING A DOUBLE EMBOSSING STRUCTURE

CHIP PACKAGE

CHIP STRUCTURE AND METHOD FOR FABRICATING THE SAME

SEMICONDUCTOR CHIP

DIGITAL CAMERA AND OPERATING METHOD THEREOF

INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND B...

LIGHT PROJECTING APPARATUS OF SCANNER MODULE

Chip Package

CHIP STRUCTURE AND METHOD FOR FABRICATING THE SAME

SEMICONDUCTOR CHIP AND PROCESS FOR FORMING THE SAME

Stacked Chip Package With Redistribution Lines

CHIP ASSEMBLY

SEMICONDUCTOR CHIP WITH POST-PASSIVATION SCHEME FORMED OVER PASSIVA...

CHIP PACKAGE

CHIP STRUCTURE AND METHOD FOR FABRICATION THE SAME

WIRE BONDING METHOD FOR PREVENTING POLYMER CRACKING

CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME

SEMICONDUCTOR CHIP

CARBON NANOTUBE CIRCUIT COMPONENT STRUCTURE

Semiconductor chip with post-passivation scheme formed over passiva...

SEMICONDUCTOR CHIP AND PROCESS FOR FORMING THE SAME

Method for forming a double embossing structure