Huahung Kao

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Decoupling capacitor integrated in system on chip (SOC) device
- Patent number 11,469,295
- Issue date Oct 11, 2022
- MARVELL ASIA PTE. LTD.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heat sink design for flip chip ball grid array
- Patent number 11,282,762
- Issue date Mar 22, 2022
- Marvell Asia Pte, Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe with improved half-etch layout to reduce defects caused d...
- Patent number 10,128,171
- Issue date Nov 13, 2018
- Marvell International Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package structures
- Patent number 9,666,571
- Issue date May 30, 2017
- Marvell World Trade Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pad configurations for an electronic package assembly
- Patent number 9,543,236
- Issue date Jan 10, 2017
- Marvell World Trade Ltd.
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures, architectures, systems, methods, algorithms and softwar...
- Patent number 9,524,927
- Issue date Dec 20, 2016
- Marvell International Ltd.
- Tyson Leistiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect layouts for electronic assemblies
- Patent number 9,355,951
- Issue date May 31, 2016
- Marvell World Trade Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pad configurations for an electronic package assembly
- Patent number 9,331,052
- Issue date May 3, 2016
- Marvell World Trade Ltd.
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package structures
- Patent number 9,209,163
- Issue date Dec 8, 2015
- Marvell World Trade Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of package pins in semiconductor packaging
- Patent number 9,123,699
- Issue date Sep 1, 2015
- Marvell International Ltd.
- Chenglin Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures, architectures, systems, methods, algorithms and softwar...
- Patent number 8,963,342
- Issue date Feb 24, 2015
- Marvell International Ltd.
- Tyson Leistiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single layer BGA substrate process
- Patent number 8,940,585
- Issue date Jan 27, 2015
- Marvell World Trade Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless multi-chip module structure
- Patent number 8,912,664
- Issue date Dec 16, 2014
- Marvell International Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pad configurations for an electronic package assembly
- Patent number 8,860,193
- Issue date Oct 14, 2014
- Marvell World Trade Ltd.
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stack die structure for stress reduction and facilitation of electr...
- Patent number 8,686,547
- Issue date Apr 1, 2014
- Marvell International Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single layer BGA substrate process
- Patent number 8,673,689
- Issue date Mar 18, 2014
- Marvell World Trade Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless multi-chip module structure
- Patent number 8,669,139
- Issue date Mar 11, 2014
- Marvell International Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures, architectures, systems, methods, algorithms and softwar...
- Patent number 8,455,347
- Issue date Jun 4, 2013
- Marvell International Ltd.
- Tyson Leistiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures, architectures, systems, methods, algorithms and softwar...
- Patent number 8,405,220
- Issue date Mar 26, 2013
- Marvell International Ltd.
- Wayne Loeb
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadless multi-chip module structure
- Patent number 8,358,013
- Issue date Jan 22, 2013
- Marvell International Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-formed conductive bumps on bonding pads
- Patent number 8,319,353
- Issue date Nov 27, 2012
- Marvell International Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-formed conductive bumps on bonding pads
- Patent number 8,030,098
- Issue date Oct 4, 2011
- Marvell International Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pillar structure on bump pad
- Patent number 7,999,395
- Issue date Aug 16, 2011
- Marvell International Ltd.
- Huahung Kao
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Structures, architectures, systems, methods, algorithms and softwar...
- Patent number 7,956,474
- Issue date Jun 7, 2011
- Marvell International Ltd.
- Tyson Leistiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stack die packages
- Patent number 7,825,521
- Issue date Nov 2, 2010
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures, architectures, systems, methods, algorithms and softwar...
- Patent number 7,586,199
- Issue date Sep 8, 2009
- Marvell International Ltd.
- Tyson Leistiko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Drop-in heat sink and exposed die-back for molded flip die package
- Patent number 7,560,309
- Issue date Jul 14, 2009
- Marvell International Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stack die packages
- Patent number 7,535,110
- Issue date May 19, 2009
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Packaging stacked substrates and an integrated circuit die using a...
- Publication number 20220051963
- Publication date Feb 17, 2022
- Marvell Asia Pte Ltd.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Heat Sink Design For Flip Chip Ball Grid Array
- Publication number 20200258807
- Publication date Aug 13, 2020
- Marvell Asia Pte, Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A VIA STRUCTURE USING A DOUBLE-SIDE LASER PROCESS
- Publication number 20160353585
- Publication date Dec 1, 2016
- Marvell World Trade Ltd.
- Huahung Kao
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY
- Publication number 20160240459
- Publication date Aug 18, 2016
- Marvell World Trade Ltd.
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE STRUCTURES
- Publication number 20160093602
- Publication date Mar 31, 2016
- Marvell World Trade Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A VIA STRUCTURE USING A DOUBLE-SIDE LASER PROCESS
- Publication number 20150257281
- Publication date Sep 10, 2015
- Marvell World Trade Ltd.
- Huahung Kao
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY
- Publication number 20150035160
- Publication date Feb 5, 2015
- Marvell World Trade Ltd.
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE STRUCTURES
- Publication number 20140231993
- Publication date Aug 21, 2014
- Marvell World Trade Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE LAYER BGA SUBSTRATE PROCESS
- Publication number 20140206152
- Publication date Jul 24, 2014
- Marvell World Trade Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE STRUCTURES
- Publication number 20140151880
- Publication date Jun 5, 2014
- Marvell World Trade Ltd.
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE STRUCTURES
- Publication number 20130043587
- Publication date Feb 21, 2013
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE LAYER BGA SUBSTRATE PROCESS
- Publication number 20120196407
- Publication date Aug 2, 2012
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY
- Publication number 20110298117
- Publication date Dec 8, 2011
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT LAYOUTS FOR ELECTRONIC ASSEMBLIES
- Publication number 20110049710
- Publication date Mar 3, 2011
- Huahung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACK DIE PACKAGES
- Publication number 20090212410
- Publication date Aug 27, 2009
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stack die packages
- Publication number 20080006948
- Publication date Jan 10, 2008
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS

Huahung Kao

Person

Patents Grantslast 30 patents

Decoupling capacitor integrated in system on chip (SOC) device

Heat sink design for flip chip ball grid array

Leadframe with improved half-etch layout to reduce defects caused d...

Package-on-package structures

Pad configurations for an electronic package assembly

Structures, architectures, systems, methods, algorithms and softwar...

Interconnect layouts for electronic assemblies

Pad configurations for an electronic package assembly

Package-on-package structures

Formation of package pins in semiconductor packaging

Structures, architectures, systems, methods, algorithms and softwar...

Single layer BGA substrate process

Leadless multi-chip module structure

Pad configurations for an electronic package assembly

Stack die structure for stress reduction and facilitation of electr...

Single layer BGA substrate process

Leadless multi-chip module structure

Structures, architectures, systems, methods, algorithms and softwar...

Structures, architectures, systems, methods, algorithms and softwar...

Leadless multi-chip module structure

Pre-formed conductive bumps on bonding pads

Pre-formed conductive bumps on bonding pads

Pillar structure on bump pad

Structures, architectures, systems, methods, algorithms and softwar...

Stack die packages

Structures, architectures, systems, methods, algorithms and softwar...

Drop-in heat sink and exposed die-back for molded flip die package

Stack die packages

Patents Applicationslast 30 patents

Packaging stacked substrates and an integrated circuit die using a...

Heat Sink Design For Flip Chip Ball Grid Array

METHOD FOR FORMING A VIA STRUCTURE USING A DOUBLE-SIDE LASER PROCESS

PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY

PACKAGE-ON-PACKAGE STRUCTURES

METHOD FOR FORMING A VIA STRUCTURE USING A DOUBLE-SIDE LASER PROCESS

PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY

PACKAGE-ON-PACKAGE STRUCTURES

SINGLE LAYER BGA SUBSTRATE PROCESS

PACKAGE-ON-PACKAGE STRUCTURES

PACKAGE-ON-PACKAGE STRUCTURES

SINGLE LAYER BGA SUBSTRATE PROCESS

PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY

INTERCONNECT LAYOUTS FOR ELECTRONIC ASSEMBLIES

STACK DIE PACKAGES

Stack die packages