Huang Liu

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
CD control
- Patent number 10,103,097
- Issue date Oct 16, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Zheng Zou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming an air gap around a through-silicon via
- Patent number 9,425,127
- Issue date Aug 23, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid TSV and method for forming the same
- Patent number 9,269,651
- Issue date Feb 23, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yu Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming through silicon via with wafer backside protection
- Patent number 9,230,886
- Issue date Jan 5, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Lup San Leong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid TSV and method for forming the same
- Patent number 9,006,102
- Issue date Apr 14, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yu Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnect for semiconductor device
- Patent number 8,987,134
- Issue date Mar 24, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Zhehui Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming an air gap around a through-silicon via
- Patent number 8,962,474
- Issue date Feb 24, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming through silicon via with wafer backside protection
- Patent number 8,940,637
- Issue date Jan 27, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Lup San Leong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable contacts
- Patent number 8,916,939
- Issue date Dec 23, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Package interconnects
- Patent number 8,883,634
- Issue date Nov 11, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Damascene process for aligning and bonding through-silicon-via base...
- Patent number 8,877,637
- Issue date Nov 4, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
STI CMP under polish monitoring
- Patent number 8,852,968
- Issue date Oct 7, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CD control
- Patent number 8,836,139
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Zheng Zou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of protecting elevated polysilicon structures during etchin...
- Patent number 8,569,173
- Issue date Oct 29, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable contacts
- Patent number 8,519,482
- Issue date Aug 27, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Integration of eNVM, RMG, and HKMG modules
- Patent number 8,518,775
- Issue date Aug 27, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Step-like spacer profile
- Patent number 8,492,236
- Issue date Jul 23, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Xuesong Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system with via and method of manufacture thereof
- Patent number 8,405,222
- Issue date Mar 26, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming high-k dielectric stop layer for contact hole ope...
- Patent number 8,354,347
- Issue date Jan 15, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jianhui Ye
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Scheme for planarizing through-silicon vias
- Patent number 8,354,327
- Issue date Jan 15, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Chen Zengxiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming shallow trench isolation structures for integrate...
- Patent number 8,178,417
- Issue date May 15, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Shailendra Mishra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nested and isolated transistors with reduced impedance difference
- Patent number 8,143,651
- Issue date Mar 27, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Johnny Widodo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnection
- Patent number 8,035,201
- Issue date Oct 11, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit including a stressed dielectric layer with stabl...
- Patent number 8,013,372
- Issue date Sep 6, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing silicide defects in integrated circuits
- Patent number 7,960,283
- Issue date Jun 14, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Jeff Jianhui Ye
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing sacrificial spacers
- Patent number 7,892,900
- Issue date Feb 22, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect capping layer and method of fabrication
- Patent number 7,855,143
- Issue date Dec 21, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having ultralow-K dielectric layer
- Patent number 7,829,422
- Issue date Nov 9, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Johnny Widodo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing selective epitaxial growth tech...
- Patent number 7,795,680
- Issue date Sep 14, 2010
- Chartered Semiconductor Manufacturing Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nested and isolated transistors with reduced impedance difference
- Patent number 7,767,577
- Issue date Aug 3, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Johnny Widodo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING PLUG FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR D...
- Publication number 20230240065
- Publication date Jul 27, 2023
- HeFeChip Corporation Limited
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID TSV AND METHOD FOR FORMING THE SAME
- Publication number 20150179547
- Publication date Jun 25, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yu Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING THROUGH SILICON VIA WITH WAFER BACKSIDE PROTECTION
- Publication number 20150137359
- Publication date May 21, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Lup San Leong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING AN AIR GAP AROUND A THROUGH-SILICON VIA
- Publication number 20150069579
- Publication date Mar 12, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE INTERCONNECTS
- Publication number 20150061085
- Publication date Mar 5, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CD CONTROL
- Publication number 20140374920
- Publication date Dec 25, 2014
- Zheng ZOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STI CMP UNDER POLISH MONITORING
- Publication number 20140234993
- Publication date Aug 21, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Liang LI
- G01 - MEASURING TESTING
Information Patent Application
COPPER HILLOCK PREVENTION WITH HYDROGEN PLASMA TREATMENT IN A DEDIC...
- Publication number 20140117545
- Publication date May 1, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Huang LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CD CONTROL
- Publication number 20140110855
- Publication date Apr 24, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Zheng ZOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING THROUGH SILICON VIA WITH WAFER BACKSIDE PROTECTION
- Publication number 20140008810
- Publication date Jan 9, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Lup San Leong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE CONTACTS
- Publication number 20130334616
- Publication date Dec 19, 2013
- GLOBALFOUNDRIER Singapore Pte. Ltd.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECT FOR SEMICONDUCTOR DEVICE
- Publication number 20130328201
- Publication date Dec 12, 2013
- Zhehui WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STEP-LIKE SPACER PROFILE
- Publication number 20130181259
- Publication date Jul 18, 2013
- Global Foundries Singapore PTE. Ltd.
- Xuesong Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Protecting Elevated Polysilicon Structures During Etchin...
- Publication number 20130149851
- Publication date Jun 13, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH SILICON VIA FOR STACKED WAFER CONNECTIONS
- Publication number 20130119543
- Publication date May 16, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING AN AIR GAP AROUND A THROUGH-SILICON VIA
- Publication number 20130115769
- Publication date May 9, 2013
- GLOBALFOUNDERIES Singapore Pte. Ltd.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF eNVM, RMG, AND HKMG MODULES
- Publication number 20130082318
- Publication date Apr 4, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE CONTACTS
- Publication number 20130075823
- Publication date Mar 28, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DAMASCENE PROCESS FOR ALIGNING AND BONDING THROUGH-SILICON-VIA BASE...
- Publication number 20130069232
- Publication date Mar 21, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE INTERCONNECTS
- Publication number 20130001793
- Publication date Jan 3, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong YU
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD OF FORMING OXIDE ENCAPSULATED CONDUCTIVE FEATURES
- Publication number 20120273949
- Publication date Nov 1, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SCHEME FOR PLANARIZING THROUGH-SILICON VIAS
- Publication number 20120270391
- Publication date Oct 25, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Chen Zengxiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hybrid TSV and Method for Forming the Same
- Publication number 20120267788
- Publication date Oct 25, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yu Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT INCLUDING A STRESSED DIELECTRIC LAYER WITH STABL...
- Publication number 20110316085
- Publication date Dec 29, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Huang LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF
- Publication number 20110316166
- Publication date Dec 29, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NESTED AND ISOLATED TRANSISTORS WITH REDUCED IMPEDANCE DIFFERENCE
- Publication number 20100301424
- Publication date Dec 2, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Johnny WIDODO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECTION
- Publication number 20100301461
- Publication date Dec 2, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS
- Publication number 20100267236
- Publication date Oct 21, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Jianhui YE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECT INTEGRATION
- Publication number 20100109155
- Publication date May 6, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Huang LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING SINGLE MASK LAYER TECHNIQUE FOR...
- Publication number 20100009527
- Publication date Jan 14, 2010
- Chartered Semiconductor Manufacturing LTD.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

CD control

Method for forming an air gap around a through-silicon via

Hybrid TSV and method for forming the same

Method for forming through silicon via with wafer backside protection

Hybrid TSV and method for forming the same

Reliable interconnect for semiconductor device

Method for forming an air gap around a through-silicon via

Method for forming through silicon via with wafer backside protection

Reliable contacts

Package interconnects

Damascene process for aligning and bonding through-silicon-via base...

STI CMP under polish monitoring

CD control

Methods of protecting elevated polysilicon structures during etchin...

Reliable contacts

Integration of eNVM, RMG, and HKMG modules

Step-like spacer profile

Integrated circuit system with via and method of manufacture thereof

Method of forming high-k dielectric stop layer for contact hole ope...

Scheme for planarizing through-silicon vias

Method of forming shallow trench isolation structures for integrate...

Nested and isolated transistors with reduced impedance difference

Reliable interconnection

Integrated circuit including a stressed dielectric layer with stabl...

Method for reducing silicide defects in integrated circuits

Integrated circuit system employing sacrificial spacers

Interconnect capping layer and method of fabrication

Integrated circuit having ultralow-K dielectric layer

Integrated circuit system employing selective epitaxial growth tech...

Nested and isolated transistors with reduced impedance difference

Patents Applicationslast 30 patents

METHOD OF FORMING PLUG FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR D...

HYBRID TSV AND METHOD FOR FORMING THE SAME

METHOD FOR FORMING THROUGH SILICON VIA WITH WAFER BACKSIDE PROTECTION

METHOD FOR FORMING AN AIR GAP AROUND A THROUGH-SILICON VIA

PACKAGE INTERCONNECTS

CD CONTROL

STI CMP UNDER POLISH MONITORING

COPPER HILLOCK PREVENTION WITH HYDROGEN PLASMA TREATMENT IN A DEDIC...

CD CONTROL

METHOD FOR FORMING THROUGH SILICON VIA WITH WAFER BACKSIDE PROTECTION

RELIABLE CONTACTS

RELIABLE INTERCONNECT FOR SEMICONDUCTOR DEVICE

STEP-LIKE SPACER PROFILE

Methods of Protecting Elevated Polysilicon Structures During Etchin...

THROUGH SILICON VIA FOR STACKED WAFER CONNECTIONS

METHOD FOR FORMING AN AIR GAP AROUND A THROUGH-SILICON VIA

INTEGRATION OF eNVM, RMG, AND HKMG MODULES

RELIABLE CONTACTS

DAMASCENE PROCESS FOR ALIGNING AND BONDING THROUGH-SILICON-VIA BASE...

PACKAGE INTERCONNECTS

METHOD OF FORMING OXIDE ENCAPSULATED CONDUCTIVE FEATURES

SCHEME FOR PLANARIZING THROUGH-SILICON VIAS

Hybrid TSV and Method for Forming the Same

INTEGRATED CIRCUIT INCLUDING A STRESSED DIELECTRIC LAYER WITH STABL...

INTEGRATED CIRCUIT SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF

NESTED AND ISOLATED TRANSISTORS WITH REDUCED IMPEDANCE DIFFERENCE

RELIABLE INTERCONNECTION

METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS

RELIABLE INTERCONNECT INTEGRATION

INTEGRATED CIRCUIT SYSTEM EMPLOYING SINGLE MASK LAYER TECHNIQUE FOR...