Igor Arsovski

Person

Williston, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-port memory architecture for a systolic array
- Patent number 11,580,059
- Issue date Feb 14, 2023
- MARVELL ASIA PTE. LTD.
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-sense amplifier based access to a single port of a memory cell
- Patent number 11,545,198
- Issue date Jan 3, 2023
- Marvell Asia Pte, Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Customer-transparent logic redundancy for improved yield
- Patent number 11,293,980
- Issue date Apr 5, 2022
- International Business Machines Corporation
- Igor Arsovski
- G01 - MEASURING TESTING
Information Patent Grant
High-density high-bandwidth static random access memory (SRAM) with...
- Patent number 11,114,155
- Issue date Sep 7, 2021
- Marvell Asia Pte, Ltd.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Sensing circuits for charge trap transistors
- Patent number 11,101,010
- Issue date Aug 24, 2021
- Marvell Asia Pte, Ltd.
- Eric D. Hunt-Schroeder
- G11 - INFORMATION STORAGE
Information Patent Grant
Hermetic barrier for semiconductor device
- Patent number 11,037,873
- Issue date Jun 15, 2021
- MARVELL GOVERNMENT SOLUTIONS, LLC.
- Nicholas A. Polomoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple sense amplifier and data path-based pseudo dual port SRAM
- Patent number 11,024,347
- Issue date Jun 1, 2021
- Marvell Asia Pte, Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel-prefix adder and method
- Patent number 11,010,133
- Issue date May 18, 2021
- Marvell Asia Pte, Ltd.
- Ranjan B. Lokappa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ternary content addressable memory
- Patent number 10,991,428
- Issue date Apr 27, 2021
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port high performance memory
- Patent number 10,978,143
- Issue date Apr 13, 2021
- Marvell Asia Pte, Ltd.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Customer-transparent logic redundancy for improved yield
- Patent number 10,955,474
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Igor Arsovski
- G01 - MEASURING TESTING
Information Patent Grant
Memory built-in self test error correcting code (MBIST ECC) for low...
- Patent number 10,950,325
- Issue date Mar 16, 2021
- Marvell Asia Pte., Ltd.
- Deepak I. Hanagandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero test time memory using background built-in self-test
- Patent number 10,839,931
- Issue date Nov 17, 2020
- Marvell Asia Pte, Ltd.
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Activity-aware supply voltage and bias voltage compensation
- Patent number 10,795,430
- Issue date Oct 6, 2020
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequential read mode static random access memory (SRAM)
- Patent number 10,796,750
- Issue date Oct 6, 2020
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic power analysis with per-memory instance activity customization
- Patent number 10,748,635
- Issue date Aug 18, 2020
- Marvell Asia Pte, Ltd.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel-prefix adder and method
- Patent number 10,705,797
- Issue date Jul 7, 2020
- Marvell International Ltd.
- Ranjan B. Lokappa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ternary content addressable memory
- Patent number 10,566,058
- Issue date Feb 18, 2020
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Customer-transparent logic redundancy for improved yield
- Patent number 10,551,436
- Issue date Feb 4, 2020
- International Business Machines Corporation
- Igor Arsovski
- G01 - MEASURING TESTING
Information Patent Grant
Scoped search engine
- Patent number 10,489,455
- Issue date Nov 26, 2019
- GLOBALFOUNDRIES U.S. INC.
- Samuel S. Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense-line muxing scheme
- Patent number 10,446,233
- Issue date Oct 15, 2019
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Zero test time memory using background built-in self-test
- Patent number 10,438,678
- Issue date Oct 8, 2019
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-test power-optimized bin reassignment following selective volta...
- Patent number 10,295,592
- Issue date May 21, 2019
- Global Foundries Inc.
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bending circuit for static random access memory (SRAM) self-timer
- Patent number 10,217,507
- Issue date Feb 26, 2019
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Ternary content addressable memory
- Patent number 10,204,685
- Issue date Feb 12, 2019
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Environmentally aware mobile computing devices
- Patent number 9,967,825
- Issue date May 8, 2018
- GLOBALFOUNDRIES Inc.
- Eric D. Hunt-Schroeder
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ternary content addressable memory (TCAM) for multi bit miss detect...
- Patent number 9,916,896
- Issue date Mar 13, 2018
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmission system having duplicate transmission systems for indiv...
- Patent number 9,893,765
- Issue date Feb 13, 2018
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Self pre-charging memory circuits
- Patent number 9,886,998
- Issue date Feb 6, 2018
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Double bandwidth algorithmic memory array
- Patent number 9,870,163
- Issue date Jan 16, 2018
- GLOBALFOUNDRIES Inc.
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROACTIVE THERMAL MANAGEMENT OF A DETERMINISTIC PROCESSOR TO IMPROV...
- Publication number 20240296069
- Publication date Sep 5, 2024
- Groq, Inc.
- Santosh Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Management of a Power Regulator in a Processor During High Cu...
- Publication number 20240248524
- Publication date Jul 25, 2024
- Groq, Inc.
- Santosh Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preemptive Processor Power Supply Regulator Feedback Modulation to...
- Publication number 20240176406
- Publication date May 30, 2024
- Groq, Inc.
- Vadim Heyfitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optical Communication for Memory Disaggregation in High Performance...
- Publication number 20230343768
- Publication date Oct 26, 2023
- Google LLC
- Horia Alexandru Toma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM
- Publication number 20210287725
- Publication date Sep 16, 2021
- Marvell Asia Pte, Ltd.
- Venkatraghavan BRINGIVIJAYARAGHAVAN
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM
- Publication number 20210118477
- Publication date Apr 22, 2021
- Marvell International Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
CUSTOMER-TRANSPARENT LOGIC REDUNDANCY FOR IMPROVED YIELD
- Publication number 20210116498
- Publication date Apr 22, 2021
- International Business Machines Corporation
- Igor ARSOVSKI
- G01 - MEASURING TESTING
Information Patent Application
SENSING CIRCUITS FOR CHARGE TRAP TRANSISTORS
- Publication number 20210082532
- Publication date Mar 18, 2021
- GLOBALFOUNDRIES INC.
- Eric D. HUNT-SCHROEDER
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PORT HIGH PERFORMANCE MEMORY
- Publication number 20210065784
- Publication date Mar 4, 2021
- George M. BRACERAS
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PORT MEMORY ARCHITECTURE FOR A SYSTOLIC ARRAY
- Publication number 20210034567
- Publication date Feb 4, 2021
- Marvell International Ltd.
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HERMETIC BARRIER FOR SEMICONDUCTOR DEVICE
- Publication number 20200381355
- Publication date Dec 3, 2020
- Avera Semiconductor LLC
- Nicholas A. Polomoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PARALLEL-PREFIX ADDER AND METHOD
- Publication number 20200334014
- Publication date Oct 22, 2020
- GLOBALFOUNDRIES INC.
- Ranjan B. Lokappa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BUILT-IN SELF TEST ERROR CORRECTING CODE (MBIST ECC) FOR LOW...
- Publication number 20200321070
- Publication date Oct 8, 2020
- Marvell International Ltd.
- Deepak I. HANAGANDI
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH-DENSITY HIGH-BANDWIDTH STATIC RANDOM ACCESS MEMORY (SRAM) WITH...
- Publication number 20200243130
- Publication date Jul 30, 2020
- Marvell International Ltd.
- Igor ARSOVSKI
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL-PREFIX ADDER AND METHOD
- Publication number 20200167127
- Publication date May 28, 2020
- GLOBALFOUNDRIES INC.
- Ranjan B. Lokappa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TERNARY CONTENT ADDRESSABLE MEMORY
- Publication number 20200152270
- Publication date May 14, 2020
- International Business Machines Corporation
- Igor ARSOVSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CUSTOMER-TRANSPARENT LOGIC REDUNDANCY FOR IMPROVED YIELD
- Publication number 20200072902
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Igor ARSOVSKI
- G01 - MEASURING TESTING
Information Patent Application
SEQUENTIAL READ MODE STATIC RANDOM ACCESS MEMORY (SRAM)
- Publication number 20200020388
- Publication date Jan 16, 2020
- GLOBALFOUNDRIES INC.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Application
ZERO TEST TIME MEMORY USING BACKGROUND BUILT-IN SELF-TEST
- Publication number 20190348137
- Publication date Nov 14, 2019
- GLOBALFOUNDRIES INC.
- Igor ARSOVSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWER ANALYSIS WITH PER-MEMORY INSTANCE ACTIVITY CUSTOMIZATION
- Publication number 20190295676
- Publication date Sep 26, 2019
- GLOBALFOUNDRIES INC.
- Igor ARSOVSKI
- G11 - INFORMATION STORAGE
Information Patent Application
TERNARY CONTENT ADDRESSABLE MEMORY
- Publication number 20190147952
- Publication date May 16, 2019
- International Business Machines Corporation
- Igor ARSOVSKI
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE-LINE MUXING SCHEME
- Publication number 20190066786
- Publication date Feb 28, 2019
- GLOBALFOUNDRIES INC.
- Igor ARSOVSKI
- G11 - INFORMATION STORAGE
Information Patent Application
ZERO TEST TIME MEMORY USING BACKGROUND BUILT-IN SELF-TEST
- Publication number 20180286491
- Publication date Oct 4, 2018
- GLOBALFOUNDRIES INC.
- Igor ARSOVSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BENDING CIRCUIT FOR STATIC RANDOM ACCESS MEMORY (SRAM) SELF-TIMER
- Publication number 20180130521
- Publication date May 10, 2018
- GLOBALFOUNDRIES INC.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
INTERPOSER HEATER FOR HIGH BANDWIDTH MEMORY APPLICATIONS
- Publication number 20180108642
- Publication date Apr 19, 2018
- GLOBALFOUNDRIES INC.
- Wolfgang SAUTER
- G11 - INFORMATION STORAGE
Information Patent Application
CUSTOMER-TRANSPARENT LOGIC REDUNDANCY FOR IMPROVED YIELD
- Publication number 20170370990
- Publication date Dec 28, 2017
- International Business Machines Corporation
- Igor ARSOVSKI
- G01 - MEASURING TESTING
Information Patent Application
ALGORITHMIC N SEARCH/M WRITE TERNARY CONTENT ADDRESSABLE MEMORY (TCAM)
- Publication number 20170365341
- Publication date Dec 21, 2017
- GLOBALFOUNDRIES INC.
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Application
SELF PRE-CHARGING MEMORY CIRCUITS
- Publication number 20170352407
- Publication date Dec 7, 2017
- GLOBALFOUNDRIES INC.
- Igor ARSOVSKI
- G11 - INFORMATION STORAGE
Information Patent Application
DOUBLE BANDWIDTH ALGORITHMIC MEMORY ARRAY
- Publication number 20170315738
- Publication date Nov 2, 2017
- GLOBALFOUNDRIES INC.
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING/POWER RISK OPTIMIZED SELECTIVE VOLTAGE BINNING USING NON-LIN...
- Publication number 20170287756
- Publication date Oct 5, 2017
- GLOBALFOUNDRIES INC.
- IGOR ARSOVSKI
- G01 - MEASURING TESTING

Igor Arsovski

Person

Patents Grantslast 30 patents

Multi-port memory architecture for a systolic array

Multi-sense amplifier based access to a single port of a memory cell

Customer-transparent logic redundancy for improved yield

High-density high-bandwidth static random access memory (SRAM) with...

Sensing circuits for charge trap transistors

Hermetic barrier for semiconductor device

Multiple sense amplifier and data path-based pseudo dual port SRAM

Parallel-prefix adder and method

Ternary content addressable memory

Multi-port high performance memory

Customer-transparent logic redundancy for improved yield

Memory built-in self test error correcting code (MBIST ECC) for low...

Zero test time memory using background built-in self-test

Activity-aware supply voltage and bias voltage compensation

Sequential read mode static random access memory (SRAM)

Dynamic power analysis with per-memory instance activity customization

Parallel-prefix adder and method

Ternary content addressable memory

Customer-transparent logic redundancy for improved yield

Scoped search engine

Sense-line muxing scheme

Zero test time memory using background built-in self-test

Pre-test power-optimized bin reassignment following selective volta...

Bending circuit for static random access memory (SRAM) self-timer

Ternary content addressable memory

Environmentally aware mobile computing devices

Ternary content addressable memory (TCAM) for multi bit miss detect...

Transmission system having duplicate transmission systems for indiv...

Self pre-charging memory circuits

Double bandwidth algorithmic memory array

Patents Applicationslast 30 patents

PROACTIVE THERMAL MANAGEMENT OF A DETERMINISTIC PROCESSOR TO IMPROV...

Power Management of a Power Regulator in a Processor During High Cu...

Preemptive Processor Power Supply Regulator Feedback Modulation to...

Optical Communication for Memory Disaggregation in High Performance...

MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM

MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM

CUSTOMER-TRANSPARENT LOGIC REDUNDANCY FOR IMPROVED YIELD

SENSING CIRCUITS FOR CHARGE TRAP TRANSISTORS

MULTI-PORT HIGH PERFORMANCE MEMORY

MULTI-PORT MEMORY ARCHITECTURE FOR A SYSTOLIC ARRAY

HERMETIC BARRIER FOR SEMICONDUCTOR DEVICE

PARALLEL-PREFIX ADDER AND METHOD

MEMORY BUILT-IN SELF TEST ERROR CORRECTING CODE (MBIST ECC) FOR LOW...

HIGH-DENSITY HIGH-BANDWIDTH STATIC RANDOM ACCESS MEMORY (SRAM) WITH...

PARALLEL-PREFIX ADDER AND METHOD

TERNARY CONTENT ADDRESSABLE MEMORY

CUSTOMER-TRANSPARENT LOGIC REDUNDANCY FOR IMPROVED YIELD

SEQUENTIAL READ MODE STATIC RANDOM ACCESS MEMORY (SRAM)

ZERO TEST TIME MEMORY USING BACKGROUND BUILT-IN SELF-TEST

DYNAMIC POWER ANALYSIS WITH PER-MEMORY INSTANCE ACTIVITY CUSTOMIZATION

TERNARY CONTENT ADDRESSABLE MEMORY

SENSE-LINE MUXING SCHEME

ZERO TEST TIME MEMORY USING BACKGROUND BUILT-IN SELF-TEST

BENDING CIRCUIT FOR STATIC RANDOM ACCESS MEMORY (SRAM) SELF-TIMER

INTERPOSER HEATER FOR HIGH BANDWIDTH MEMORY APPLICATIONS

CUSTOMER-TRANSPARENT LOGIC REDUNDANCY FOR IMPROVED YIELD

ALGORITHMIC N SEARCH/M WRITE TERNARY CONTENT ADDRESSABLE MEMORY (TCAM)

SELF PRE-CHARGING MEMORY CIRCUITS

DOUBLE BANDWIDTH ALGORITHMIC MEMORY ARRAY

TIMING/POWER RISK OPTIMIZED SELECTIVE VOLTAGE BINNING USING NON-LIN...