James A. Watson

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Phase shift keying signaling for integrated circuits
- Patent number 7,512,188
- Issue date Mar 31, 2009
- Xilinx, Inc.
- James A. Watson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Frequency shift keying signaling for integrated circuits
- Patent number 7,349,488
- Issue date Mar 25, 2008
- Xilinx, Inc.
- Michael A. Margolese
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and circuit for controlling an antenna system
- Patent number 7,088,288
- Issue date Aug 8, 2006
- Xilinx, Inc.
- Michael A. Margolese
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,897,679
- Issue date May 24, 2005
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable depth and width memory device
- Patent number RE38651
- Issue date Nov 9, 2004
- Altera Corporation
- Chiakang Sung
- 711 - Electrical computers and digital processing systems: memory
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,134,173
- Issue date Oct 17, 2000
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,064,599
- Issue date May 16, 2000
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,028,808
- Issue date Feb 22, 2000
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,023,439
- Issue date Feb 8, 2000
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,018,490
- Issue date Jan 25, 2000
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced method of testing semiconductor devices having nonvolatile...
- Patent number 5,982,683
- Issue date Nov 9, 1999
- Advanced Micro Devices, Inc.
- James A. Watson
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer for identification of pin contentions in circuit design and...
- Patent number 5,909,375
- Issue date Jun 1, 1999
- Altera Corporation
- Cameron McClintock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,883,850
- Issue date Mar 16, 1999
- Altera Corporation
- Fung Fung Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,848,005
- Issue date Dec 8, 1998
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,838,628
- Issue date Nov 17, 1998
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,828,229
- Issue date Oct 27, 1998
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,812,479
- Issue date Sep 22, 1998
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,764,583
- Issue date Jun 9, 1998
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,668,771
- Issue date Sep 16, 1997
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 5,550,782
- Issue date Aug 27, 1996
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Expanded programmable logic architecture
- Patent number 5,463,328
- Issue date Oct 31, 1995
- Altera Corporation
- L. Todd Cope
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLD with selective inputs from local and global conductors
- Patent number 5,444,394
- Issue date Aug 22, 1995
- Altera Corporation
- James A. Watson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-density erasable programmable logic device architecture using...
- Patent number 5,384,499
- Issue date Jan 24, 1995
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ram convertible look-up table based macrocell for PLDs
- Patent number 5,352,940
- Issue date Oct 4, 1994
- Altera Corporation
- James Watson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-density erasable programmable logic device architecture using...
- Patent number 5,268,598
- Issue date Dec 7, 1993
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-density erasable programmable logic device architecture using...
- Patent number 5,241,224
- Issue date Aug 31, 1993
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuits with reduced switching noise
- Patent number 5,066,873
- Issue date Nov 19, 1991
- Altera Corporation
- Yiu-Fai Chan
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Programmable logic array integrated circuits
- Publication number 20040066212
- Publication date Apr 8, 2004
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic array integrated circuits
- Publication number 20020130681
- Publication date Sep 19, 2002
- Richard G. Cliff
- G01 - MEASURING TESTING

James A. Watson

Person

Patents Grantslast 30 patents

Phase shift keying signaling for integrated circuits

Frequency shift keying signaling for integrated circuits

Method and circuit for controlling an antenna system

Programmable logic array integrated circuits

Variable depth and width memory device

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Enhanced method of testing semiconductor devices having nonvolatile...

Buffer for identification of pin contentions in circuit design and...

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Programmable logic array integrated circuits

Expanded programmable logic architecture

PLD with selective inputs from local and global conductors

High-density erasable programmable logic device architecture using...

Ram convertible look-up table based macrocell for PLDs

High-density erasable programmable logic device architecture using...

High-density erasable programmable logic device architecture using...

Integrated circuits with reduced switching noise

Patents Applicationslast 30 patents

Programmable logic array integrated circuits

Programmable logic array integrated circuits