Jeffrey A. Shields

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Chandler, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
EEPROM memory cell with low voltage read path and high voltage eras...
- Patent number 9,455,037
- Issue date Sep 27, 2016
- Microchip Technology Incorporated
- Kent Hewitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming an array of NMOS EEPROM cells that minimizes...
- Patent number 8,094,503
- Issue date Jan 10, 2012
- Microchip Technology Incorporated
- Jeffrey A. Shields
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming and erasing an array of NMOS EEPROM cells th...
- Patent number 7,817,474
- Issue date Oct 19, 2010
- Microchip Technology Incorporated
- Jeffrey A. Shields
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming and erasing an array of NMOS EEPROM cells th...
- Patent number 7,466,591
- Issue date Dec 16, 2008
- Microchip Technology Incorporated
- Jeffrey A. Shields
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming method for a memory cell
- Patent number 6,236,595
- Issue date May 22, 2001
- Microchip Technology Incorporated
- Donald S. Gerber
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for minimizing program disturb in a memory cell
- Patent number 6,222,761
- Issue date Apr 24, 2001
- Microchip Technology Incorporated
- Donald S. Gerber
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
EEPROM MEMORY CELL WITH LOW VOLTAGE READ PATH AND HIGH VOLTAGE ERAS...
- Publication number 20140269102
- Publication date Sep 18, 2014
- MICROCHIP TECHNOLOGY INCORPORATED
- Kent Hewitt
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF PROGRAMMING AN ARRAY OF NMOS EEPROM CELLS THAT MINIMIZES...
- Publication number 20100302857
- Publication date Dec 2, 2010
- MICROCHIP TECHNOLOGY INCORPORATED
- Jeffrey A. Shields
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Programming and Erasing an Array of NMOS EEPROM Cells th...
- Publication number 20090122618
- Publication date May 14, 2009
- MICROCHIP TECHNOLOGY INCORPORATED
- Jeffrey A. Shields
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Programming and Erasing an Array of NMOS EEPROM Cells Th...
- Publication number 20070280001
- Publication date Dec 6, 2007
- MICROCHIP TECHNOLOGY INCORPORATED
- Jeffrey A. Shields
- G11 - INFORMATION STORAGE
Information Patent Application
Independently programmable memory segments within an NMOS electrica...
- Publication number 20070140008
- Publication date Jun 21, 2007
- MICROCHIP TECHNOLOGY INCORPORATED
- Jeffrey Shields
- G11 - INFORMATION STORAGE
Information Patent Application
Method for minimizing program disturb in a memory cell
- Publication number 20020006059
- Publication date Jan 17, 2002
- Donald S. Gerber
- G11 - INFORMATION STORAGE