Keith A. Ford

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Automated integrated circuit design documentation
- Patent number 9,038,004
- Issue date May 19, 2015
- International Business Machines Corporation
- Keith A. Ford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture, method(s) and circuitry for low power memories
- Patent number 6,674,682
- Issue date Jan 6, 2004
- Cypress Semiconductor Corp.
- Keith A. Ford
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel test in asynchronous memory with single-ended output path
- Patent number 6,662,315
- Issue date Dec 9, 2003
- Cypress Semiconductor Corporation
- Iulian C. Gradinariu
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture, circuitry and method of transferring data into and/or...
- Patent number 6,629,185
- Issue date Sep 30, 2003
- Cypress Semiconductor Corp.
- John Silver
- G11 - INFORMATION STORAGE
Information Patent Grant
Block redundancy in ultra low power memory circuits
- Patent number 6,535,437
- Issue date Mar 18, 2003
- Cypress Semiconductor Corp.
- John J. Silver
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel test in asynchronous memory with single-ended output path
- Patent number 6,530,040
- Issue date Mar 4, 2003
- Cypress Semiconductor Corp.
- Iulian C. Gradinariu
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture, method (s) and circuitry for low power memories
- Patent number 6,493,283
- Issue date Dec 10, 2002
- Cypress Semiconductor Corp.
- Keith A. Ford
- G11 - INFORMATION STORAGE
Information Patent Grant
Scheme for reducing leakage current in an input buffer
- Patent number 6,323,701
- Issue date Nov 27, 2001
- Cypress Semiconductor Corporation
- Iulian C. Gradinariu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel test for asynchronous memory
- Patent number 6,324,107
- Issue date Nov 27, 2001
- Cypress Semiconductor Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Block redundancy in ultra low power memory circuits
- Patent number 6,249,464
- Issue date Jun 19, 2001
- Cypress Semiconductor Corp.
- John J. Silver
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture, method(s) and circuitry for low power memories
- Patent number 6,163,495
- Issue date Dec 19, 2000
- Cypress Semiconductor Corp.
- Keith A. Ford
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel test for asynchronous memory
- Patent number 6,111,800
- Issue date Aug 29, 2000
- Cypress Semiconductor Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory bit-line pull-up scheme
- Patent number 5,675,542
- Issue date Oct 7, 1997
- Cypress Semiconductor Corp.
- Keith A. Ford
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATED INTEGRATED CIRCUIT DESIGN DOCUMENTATION
- Publication number 20150113487
- Publication date Apr 23, 2015
- International Business Machines Corporation
- Keith A. FORD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture, method(s) and circuitry for low power memories
- Publication number 20020191470
- Publication date Dec 19, 2002
- Keith A. Ford
- G11 - INFORMATION STORAGE

Keith A. Ford

Person

Patents Grantslast 30 patents

Automated integrated circuit design documentation

Architecture, method(s) and circuitry for low power memories

Parallel test in asynchronous memory with single-ended output path

Architecture, circuitry and method of transferring data into and/or...

Block redundancy in ultra low power memory circuits

Parallel test in asynchronous memory with single-ended output path

Architecture, method (s) and circuitry for low power memories

Scheme for reducing leakage current in an input buffer

Parallel test for asynchronous memory

Block redundancy in ultra low power memory circuits

Architecture, method(s) and circuitry for low power memories

Parallel test for asynchronous memory

Memory bit-line pull-up scheme

Patents Applicationslast 30 patents

AUTOMATED INTEGRATED CIRCUIT DESIGN DOCUMENTATION

Architecture, method(s) and circuitry for low power memories