Kenneth M. Sautter

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of improving the adhesion strength of metal-organic interfac...
- Patent number 11,919,036
- Issue date Mar 5, 2024
- YIELD ENGINEERING SYSTEMS, INC.
- Kenneth Sautter
- B05 - SPRAYING OR ATOMISING IN GENERAL APPLYING LIQUIDS OR OTHER FLUENT MATER...
Information Patent Grant
Method of using processing oven
- Patent number 11,850,672
- Issue date Dec 26, 2023
- YIELD ENGINEERING SYSTEMS, INC.
- Lei Jing
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of using processing oven
- Patent number 11,465,225
- Issue date Oct 11, 2022
- YIELD ENGINEERING SYSTEMS, INC.
- Lei Jing
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of using a processing oven
- Patent number 11,456,274
- Issue date Sep 27, 2022
- YIELD ENGINEERING SYSTEMS, INC.
- M Ziaul Karim
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for efficient coating of substrates including plasma cleanin...
- Patent number 8,361,548
- Issue date Jan 29, 2013
- Yield Engineering Systems, Inc.
- William A. Moffat
- B05 - SPRAYING OR ATOMISING IN GENERAL APPLYING LIQUIDS OR OTHER FLUENT MATER...
Information Patent Grant
Silicon segment programming apparatus and three terminal fuse confi...
- Patent number 6,486,528
- Issue date Nov 26, 2002
- Vertical Circuits, Inc.
- David V. Pedersen
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Vertical interconnect process for silicon segments with dielectric...
- Patent number 6,255,726
- Issue date Jul 3, 2001
- Cubic Memory, Inc.
- Alfons Vindasius
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical interconnect process for silicon segments
- Patent number 6,188,126
- Issue date Feb 13, 2001
- Cubic Memory Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming vertical interconnect process for silicon segmen...
- Patent number 6,177,296
- Issue date Jan 23, 2001
- Cubic Memory Inc.
- Alfons Vindasius
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive epoxy flip-chip package and method
- Patent number 6,134,118
- Issue date Oct 17, 2000
- Cubic Memory Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical interconnect process for silicon segments with thermally c...
- Patent number 6,124,633
- Issue date Sep 26, 2000
- Cubic Memory
- Alfons Vindasius
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming vertical interconnect process for silicon segmen...
- Patent number 6,080,596
- Issue date Jun 27, 2000
- Cubic Memory Inc.
- Alfons Vindasius
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon segment programming method
- Patent number 5,994,170
- Issue date Nov 30, 1999
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Speaker diaphragm
- Patent number 5,936,302
- Issue date Aug 10, 1999
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming vertical interconnect process for silicon segmen...
- Patent number 5,891,761
- Issue date Apr 6, 1999
- Cubic Memory, Inc.
- Alfons Vindasius
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical interconnect process for silicon segments
- Patent number 5,837,566
- Issue date Nov 17, 1998
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon segment programming method and apparatus
- Patent number 5,698,895
- Issue date Dec 16, 1997
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical interconnect process for silicon segments
- Patent number 5,675,180
- Issue date Oct 7, 1997
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical interconnect process for silicon segments
- Patent number 5,661,087
- Issue date Aug 26, 1997
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive epoxy flip-chip package and method
- Patent number 5,657,206
- Issue date Aug 12, 1997
- Cubic Memory, Inc.
- David V. Pedersen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-line photoresist thickness monitor
- Patent number 4,977,330
- Issue date Dec 11, 1990
- Tom W. Batchelder
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Resist development method
- Patent number 4,647,172
- Issue date Mar 3, 1987
- GCA Corporation
- William T. Batchelder
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF USING PROCESSING OVEN
- Publication number 20240066618
- Publication date Feb 29, 2024
- Yield Engineering Systems, Inc.
- Lei Jing
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF USING PROCESSING OVEN
- Publication number 20230060603
- Publication date Mar 2, 2023
- Yield Engineering Systems, Inc.
- Lei Jing
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method for efficient coating of substrates including plasma cleanin...
- Publication number 20100203260
- Publication date Aug 12, 2010
- William A. Moffat
- B05 - SPRAYING OR ATOMISING IN GENERAL APPLYING LIQUIDS OR OTHER FLUENT MATER...

Kenneth M. Sautter

Person

Patents Grantslast 30 patents

Method of improving the adhesion strength of metal-organic interfac...

Method of using processing oven

Method of using processing oven

Method of using a processing oven

Method for efficient coating of substrates including plasma cleanin...

Silicon segment programming apparatus and three terminal fuse confi...

Vertical interconnect process for silicon segments with dielectric...

Vertical interconnect process for silicon segments

Method for forming vertical interconnect process for silicon segmen...

Conductive epoxy flip-chip package and method

Vertical interconnect process for silicon segments with thermally c...

Method for forming vertical interconnect process for silicon segmen...

Silicon segment programming method

Speaker diaphragm

Method for forming vertical interconnect process for silicon segmen...

Vertical interconnect process for silicon segments

Silicon segment programming method and apparatus

Vertical interconnect process for silicon segments

Vertical interconnect process for silicon segments

Conductive epoxy flip-chip package and method

In-line photoresist thickness monitor

Resist development method

Patents Applicationslast 30 patents

METHOD OF USING PROCESSING OVEN

METHOD OF USING PROCESSING OVEN

Method for efficient coating of substrates including plasma cleanin...