Kiyoaki Hashimoto

Person

Kanagawa, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 11,830,845
- Issue date Nov 28, 2023
- TESSERA LLC
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 11,424,211
- Issue date Aug 23, 2022
- TESSERA LLC
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 10,833,044
- Issue date Nov 10, 2020
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 10,593,643
- Issue date Mar 17, 2020
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 10,062,661
- Issue date Aug 28, 2018
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip assembly and method for making same
- Patent number 9,716,075
- Issue date Jul 25, 2017
- Tessera, Inc.
- Teck-Gyu Kang
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 9,691,731
- Issue date Jun 27, 2017
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a fan-out WLP with package
- Patent number 9,337,165
- Issue date May 10, 2016
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 9,224,717
- Issue date Dec 29, 2015
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip assembly and method for making same
- Patent number 9,137,903
- Issue date Sep 15, 2015
- Tessera, Inc.
- Teck-Gyu Kang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 9,093,435
- Issue date Jul 28, 2015
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 8,969,133
- Issue date Mar 3, 2015
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan-out microelectronic unit WLP having interconnects comprising a...
- Patent number 8,890,304
- Issue date Nov 18, 2014
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package assembly with wire bonds to encapsulation surface
- Patent number 8,618,659
- Issue date Dec 31, 2013
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip with sintered connections to package
- Patent number 8,525,338
- Issue date Sep 3, 2013
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20240203930
- Publication date Jun 20, 2024
- Adeia Semiconductor Solutions LLC
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20220375891
- Publication date Nov 24, 2022
- TESSERA LLC
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-On-Package Assembly With Wire Bonds To Encapsulation Surface
- Publication number 20210050322
- Publication date Feb 18, 2021
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20200168579
- Publication date May 28, 2020
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20180350766
- Publication date Dec 6, 2018
- Tessera, Inc.
- Hiroaki SATO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor chip assembly and method for making same
- Publication number 20170309593
- Publication date Oct 26, 2017
- Tessera, Inc.
- Teck-Gyu KANG
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20170287733
- Publication date Oct 5, 2017
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR P...
- Publication number 20170207157
- Publication date Jul 20, 2017
- J-DEVICES CORPORATION
- Kiyoaki HASHIMOTO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fan-out WLP with package
- Publication number 20160254247
- Publication date Sep 1, 2016
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20160211237
- Publication date Jul 21, 2016
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME
- Publication number 20160005711
- Publication date Jan 7, 2016
- Tessera, Inc.
- Teck-Gyu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20150091118
- Publication date Apr 2, 2015
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fan-Out WLP With Package
- Publication number 20150044824
- Publication date Feb 12, 2015
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20130203216
- Publication date Aug 8, 2013
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN-OUT WLP WITH PACKAGE
- Publication number 20120313253
- Publication date Dec 13, 2012
- Tessera, Inc.
- Yoshikuni Nakadaira
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP WITH SINTERED CONNECTIONS TO PACKAGE
- Publication number 20120313264
- Publication date Dec 13, 2012
- Teresa, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
- Publication number 20120280386
- Publication date Nov 8, 2012
- Tessera, Inc.
- Hiroaki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME
- Publication number 20120155055
- Publication date Jun 21, 2012
- Tessera, Inc.
- Teck-Gyu Kang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Kiyoaki Hashimoto

Person

Patents Grantslast 30 patents

Package-on-package assembly with wire bonds to encapsulation surface

Package-on-package assembly with wire bonds to encapsulation surface

Package-on-package assembly with wire bonds to encapsulation surface

Package-on-package assembly with wire bonds to encapsulation surface

Package-on-package assembly with wire bonds to encapsulation surface

Semiconductor chip assembly and method for making same

Package-on-package assembly with wire bonds to encapsulation surface

Method for manufacturing a fan-out WLP with package

Package-on-package assembly with wire bonds to encapsulation surface

Semiconductor chip assembly and method for making same

Package-on-package assembly with wire bonds to encapsulation surface

Package-on-package assembly with wire bonds to encapsulation surface

Fan-out microelectronic unit WLP having interconnects comprising a...

Package-on-package assembly with wire bonds to encapsulation surface

Chip with sintered connections to package

Patents Applicationslast 30 patents

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

Package-On-Package Assembly With Wire Bonds To Encapsulation Surface

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

Semiconductor chip assembly and method for making same

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR P...

Fan-out WLP with package

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

Fan-Out WLP With Package

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

FAN-OUT WLP WITH PACKAGE

CHIP WITH SINTERED CONNECTIONS TO PACKAGE

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE

SEMICONDUCTOR CHIP ASSEMBLY AND METHOD FOR MAKING SAME