Patent Grant
9224717
The subject matter of this application relates to microelectronic packages and fabrication methods thereof, particularly those which incorporate wire bonds for electrical connection with an element above a surface of an encapsulation layer.
Microelectronic devices such as semiconductor chips typically require many input and output connections to other electronic components. The input and output contacts of a semiconductor chip or other comparable device are generally disposed in grid-like patterns that substantially cover a surface of the device (commonly referred to as an “area array”) or in elongated rows which may extend parallel to and adjacent each edge of the device's front surface, or in the center of the front surface. Typically, devices such as chips must be physically mounted on a substrate such as a printed circuit board, and the contacts of the device must be electrically connected to electrically conductive features of the circuit board.
Semiconductor chips are commonly provided in packages that facilitate handling of the chip during manufacture and during mounting of the chip on an external substrate such as a circuit board or other circuit panel. For example, many semiconductor chips are provided in packages suitable for surface mounting. Numerous packages of this general type have been proposed for various applications. Most commonly, such packages include a dielectric element, commonly referred to as a “chip carrier” with terminals formed as plated or etched metallic structures on the dielectric. These terminals typically are connected to the contacts of the chip itself by features such as thin traces extending along the chip carrier itself and by fine leads or wires extending between the contacts of the chip and the terminals or traces. In a surface mounting operation, the package is placed onto a circuit board so that each terminal on the package is aligned with a corresponding contact pad on the circuit board. Solder or other bonding material is provided between the terminals and the contact pads. The package can be permanently bonded in place by heating the assembly so as to melt or “reflow” the solder or otherwise activate the bonding material.
Many packages include solder masses in the form of solder balls, typically about 0.1 mm and about 0.8 mm (5 and 30 mils) in diameter, attached to the terminals of the package. A package having an array of solder balls projecting from its bottom surface is commonly referred to as a ball grid array or “BGA” package. Other packages, referred to as land grid array or “LGA” packages are secured to the substrate by thin layers or lands formed from solder. Packages of this type can be quite compact. Certain packages, commonly referred to as “chip scale packages,” occupy an area of the circuit board equal to, or only slightly larger than, the area of the device incorporated in the package. This is advantageous in that it reduces the overall size of the assembly and permits the use of short interconnections between various devices on the substrate, which in turn limits signal propagation time between devices and thus facilitates operation of the assembly at high speeds.
Packaged semiconductor chips are often provided in “stacked” arrangements, wherein one package is provided, for example, on a circuit board, and another package is mounted on top of the first package. These arrangements can allow a number of different chips to be mounted within a single footprint on a circuit board and can further facilitate high-speed operation by providing a short interconnection between packages. Often, this interconnect distance is only slightly larger than the thickness of the chip itself. For interconnection to be achieved within a stack of chip packages, it is necessary to provide structures for mechanical and electrical connection on both sides of each package (except for the topmost package). This has been done, for example, by providing contact pads or lands on both sides of the substrate to which the chip is mounted, the pads being connected through the substrate by conductive vias or the like. Solder balls or the like have been used to bridge the gap between the contacts on the top of a lower substrate to the contacts on the bottom of the next higher substrate. The solder balls must be higher than the height of the chip in order to connect the contacts. Examples of stacked chip arrangements and interconnect structures are provided in U.S. Patent App. Pub. No. 2010/0232129 (“the '129 Publication”), the disclosure of which is incorporated by reference herein in its entirety.
Microcontact elements in the form of elongated posts or pins may be used to connect microelectronic packages to circuit boards and for other connections in microelectronic packaging. In some instances, microcontacts have been formed by etching a metallic structure including one or more metallic layers to form the microcontacts. The etching process limits the size of the microcontacts. Conventional etching processes typically cannot form microcontacts with a large ratio of height to maximum width, referred to herein as “aspect ratio”. It has been difficult or impossible to form arrays of microcontacts with appreciable height and very small pitch or spacing between adjacent microcontacts. Moreover, the configurations of the microcontacts formed by conventional etching processes are limited.
Despite all of the above-described advances in the art, still further improvements in making and testing microelectronic packages would be desirable.
An embodiment of the present disclosure relates to a microelectronic package. The microelectronic package includes a substrate having a first region and a second region and a first surface and a second surface remote from the first surface. At least one microelectronic element overlies the first surface within the first region. Electrically conductive elements are exposed at at least one of the first surface and the second surface of the substrate within the second region, and at least some of the conductive elements are electrically connected to the at least one microelectronic element. The microelectronic package further includes wire bonds having bases joined to respective ones of the conductive elements and end surfaces remote from the substrate and remote from the bases, each wire bond defining an edge surface extending between the base and the end surface thereof. A dielectric encapsulation layer extends from at least one of the first or second surfaces and fills spaces between the wire bonds such that the wire bonds are separated from one another by the encapsulation layer. The encapsulation layer overlies at least the second region of the substrate, and unencapsulated portions of the wire bonds are defined by at least portions of the end surfaces of the wire bonds that are uncovered by the encapsulation layer. The substrate can be a lead frame and the conductive elements can be leads of the lead frame.
The unencapsulated portions of the wire bonds can be defined by the end surfaces of the wire bonds and portions of the edge surfaces adjacent the end surfaces that are uncovered by the encapsulation layer. An oxidation protection layer can be included contacting at least some of the unencapsulated portions of the wire bonds. At least a portion of at least one of the wire bonds adjacent the end surface thereof can be substantially perpendicular to a surface of the encapsulation layer. The conductive elements can be first conductive elements, and the microelectronic package can further include a plurality of second conductive elements electrically connected to the unencapsulated portions of the wire bonds. In such an embodiment, the second conductive elements can be such that they do not contact the first conductive elements. The second conductive elements can include a plurality of stud bumps joined to the end surfaces of at least some of the first wire bonds.
At least one of the wire bonds can extend along a substantially straight line between the base and the unencapsulated portion thereof, and the substantially straight line can form an angle of less than 90° with respect to the first surface of the substrate. Additionally or alternatively, the edge surface of at least one of the wire bonds can have a first portion adjacent the end surface and a second portion separated from the end surface by the first portion, and the first portion can extend in a direction away from a direction in which the second portion extends.
Another embodiment of the present disclosure relates to an alternative microelectronic package. Such a microelectronic package includes a substrate having a first region and a second region, and a first surface and a second surface remote from the first surface. At least one microelectronic element overlies the first surface within the first region. Electrically conductive elements are exposed at at least one of the first surface and the second surface of the substrate within the second region, and at least some of the conductive elements are electrically connected to the at least one microelectronic element. The microelectronic package further includes a plurality of wire bonds having bases joined to respective ones of the conductive elements and end surfaces remote from the substrate and remote from the bases. Each wire bond defines an edge surface extending between the base and the end surface thereof. A dielectric encapsulation layer extends from at least one of the first or second surfaces and fills spaces between wire bonds such that the wire bonds are separated from one another by the encapsulation layer. The encapsulation layer overlies at least the second region of the substrate, and unencapsulated portions of the wire bonds are defined by at least portions of the edge surfaces adjacent the end surfaces of the wire bonds that are uncovered by the encapsulation layer.
The encapsulation layer can be a monolithic layer formed on the substrate by depositing a dielectric material onto the first substrate after forming the wire bonds, and then curing the deposited dielectric material. The forming of the monolithic encapsulation layer can include molding the dielectric material.
At least one of the unencapsulated portions can be further defined by at least a portion of the end surface that is uncovered by the encapsulation layer. The portion of the edge surface that is uncovered by the encapsulation layer can have a longest dimension extending in a direction substantially parallel to the surface of the encapsulation layer. The length of the portion of the edge surface that is uncovered by the encapsulation layer and extends substantially parallel to the surface of the encapsulation layer can be greater than a cross-sectional width of the wire bond.
In either of the aforementioned embodiments, the first surface of the substrate can extend in first and second lateral directions, each lateral direction being transverse to a direction of a thickness of the substrate between the first and second surfaces. The unencapsulated portion of at least one of the wire bonds can further be displaced in at least one of the lateral directions from the conductive element to which the at least one wire bond is joined. At least one of the wire bonds can include a substantially curved portion between the base and the end surface thereof. The unencapsulated portion of the at least one wire bond can overlie a major surface of the microelectronic element.
In either of the aforementioned embodiments, a solder ball can be joined to the unencapsulated portion of least one of the wire bonds.
Additionally, in either of the aforementioned embodiments, the encapsulation layer can include at least one surface, and the unencapsulated portions of the wire bonds can be uncovered by the encapsulation layer at one of the at least one surface. The at least one surface can include a major surface that is substantially parallel to the first surface of the substrate, and the unencapsulated portion of at least one of the wire bonds can be uncovered by the encapsulation layer at the major surface. The unencapsulated portion of at least one wire bond can be substantially flush with the major surface. Alternatively, the unencapsulated portion of at least one wire bond can extend above the major surface. The at least one surface can include a major surface at a first distance from the first surface of the substrate and a recessed surface at a second distance from first surface of the substrate that is less than the first distance, and the unencapsulated portion of at least one of the wire bonds can be uncovered by the encapsulation layer at the recessed surface. The at least one surface can further include a side surface extending away from the first surface of the substrate at a substantial angle therefrom, and the unencapsulated portion of at least one wire bond can be uncovered by the encapsulation layer at the side surface. The encapsulation layer can have a cavity formed therein that extends from a surface of the encapsulation layer toward the substrate, and the unencapsulated portion of one of the wire bonds can be disposed within the cavity.
Further, in either of the aforementioned embodiments, the wire bonds can consist essentially of at least one material selected from the group consisting of copper, gold, aluminum, and solder. At least one of the wire bonds can define a longitudinal axis along a length thereof, and each wire bond can include an inner layer of a first material extending along the longitudinal axis and an outer layer of a second material remote from the longitudinal axis and having a length extending in a lengthwise direction of such wire bond. In such an embodiment, the first material can be one of copper, gold, nickel, and aluminum, and the second material can be one of copper, gold, nickel, aluminum, and solder.
In either of the aforementioned embodiments, the plurality of wire bonds can be first wire bonds, and the microelectronic package can further comprise at least one second wire bond having a base joined to a contact on the microelectronic element and an end surface thereof remote from the contact. The at least one second wire bond can define an edge surface extending between the base and the end surface, and an unencapsulated portion of the at least one second wire bond can be defined by a portion of at least one of the end surface of such second wire bond or of the edge surface of such second wire bond that is uncovered by the encapsulation layer. The at least one microelectronic element can be a first microelectronic element, and the microelectronic package can further comprise at least one second microelectronic element at least partially overlying the first microelectronic element. In such an embodiment, the wire bonds can be first wire bonds, and the microelectronic package can have at least one second wire bond having a base joined to a contact on the microelectronic element and an end surface remote from the contact. The at least one second wire bond can define an edge surface between the base and the end surface, and an unencapsulated portion of the second wire bond can be defined by at least one of a portion of the end surface of such second wire bond or of the edge surface of such second wire bond that is uncovered by the encapsulation layer.
In either of the above embodiments, a first one of the wire bonds can be adapted for carrying a first signal electric potential and a second one of the wire bonds can be adapted for simultaneously carrying a second electric potential different from the first signal electric potential.
Either of the above embodiments can further include a redistribution layer extending along the surface of the encapsulation layer. The redistribution layer can include a redistribution substrate having a first surface adjacent a major surface of the encapsulation layer, and the redistribution layer can further include a second surface remote from the first surface, first conductive pads exposed on the first surface of the redistribution substrate and aligned with and mechanically connected to respective unencapsulated portions of the wire bonds, and second conductive pads exposed on the second surface of the substrate electrically connected to the first conductive pads.
In a further embodiment, a microelectronic assembly can include a first microelectronic package according to either of the above embodiments. The assembly can further include a second microelectronic package having a substrate with a first surface and a second surface. A second microelectronic element can be mounted to the first surface, and contact pads can be exposed at the second surface and can be electrically connected to the second microelectronic element. The second microelectronic package can be mounted to the first microelectronic package such that the second surface of the second microelectronic package overlies at least a portion of the surface of the dielectric encapsulation layer and such that at least some of the contact pads are electrically and mechanically connected to at least some of the unencapsulated portions of the wire bonds.
Another embodiment of the present disclosure can relate to a microelectronic package including a substrate having a first region and a second region, and a first surface and a second surface remote from the first surface and extending in lateral directions. A microelectronic element overlies the first surface within the first region and has a major surface remote from the substrate. Electrically conductive elements are exposed at the first surface of the substrate within the second region with at least some of the conductive elements being electrically connected to the microelectronic element. The microelectronic package further includes wire bonds having bases joined to respective ones of the first electrically conductive elements and end surfaces remote from the substrate and remote from the bases. Each wire bond defines an edge surface extending between the base and the end surface thereof. A dielectric encapsulation layer extends from at least one of the first or second surfaces and fills spaces between the wire bonds such that the wire bonds are separated from one another by the dielectric layer. The encapsulation layer overlies at least the second region of the substrate, and unencapsulated portions of the wire bonds are defined by at least portions of the end surfaces of the wire bonds that are uncovered by the encapsulation layer. The unencapsulated portion of at least one wire bond is displaced in at least one lateral direction along the first surface from the conductive element to which the at least one wire bond is joined such that the unencapsulated portion thereof overlies the major surface of the microelectronic element.
The conductive elements can be arranged in a first array of a first predetermined configuration, and the unencapsulated portions of the wire bonds can be arranged in a second array of a second predetermined configuration that is different from the first predetermined configuration. The first predetermined configuration can be characterized by a first pitch and the second configuration can be characterized by a second pitch that is finer than the first pitch. An insulating layer can extend over at least a surface of the microelectronic element. The insulating layer can be disposed between the surface of the microelectronic element and the at least one wire bond that has an unencapsulated portion overlying the major surface of the microelectronic element. A plurality of the unencapsulated portions of respective ones of the wire bonds can overlie the major surface of the microelectronic element.
A microelectronic assembly according to an embodiment of the invention can include a first microelectronic package according the above description. The assembly can further include a second microelectronic package including a substrate having a first surface and a second surface, a microelectronic element affixed on the first surface, and contact pads exposed on the second surface and electrically connected to the microelectronic element. The second microelectronic package can be affixed on the first microelectronic package such that the second surface of the second package overlies at least a portion of the surface of the dielectric layer and such that at least some of the contact pads are electrically and mechanically connected to at least some of the unencapsulated portions of the wire bonds.
The electrically conductive elements of the first microelectronic package can be arranged in a first array of a first predetermined configuration, and the contact pads of the second microelectronic package can be arranged in a second array of a second predetermined configuration that is different from the first predetermined configuration. At least some of the unencapsulated portions of the wire bonds of the first microelectronic package can be arranged in a third array that corresponds to the second predetermined configuration. The first predetermined configuration can be characterized by a first pitch, and the second configuration can be characterized by a second pitch that is finer than the first pitch.
A further embodiment of the present invention can relate to a method of making a microelectronic package. The method includes forming a dielectric encapsulation layer on an in-process unit. The in-process unit includes a substrate having a first surface and a second surface remote therefrom, a microelectronic element mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface. At least some of the conductive elements are electrically connected to the microelectronic element. The in-process unit further includes wire bonds having bases joined to the conductive elements and end surfaces remote from the bases. Each wire bond defines an edge surface extending away between the base and the end surface. The encapsulation layer is formed so as to at least partially cover the first surface and portions of the wire bonds and such that unencapsulated portions of the wire bonds are defined by a portion of at least one of the end surface or of the edge surface thereof that is uncovered by the encapsulation layer. The substrate of the in-process unit can be a lead frame and the conductive elements can be leads of the lead frame. A stud bump can be formed on the unencapsulated portion of at least one of the wire bonds. A solder ball can be deposited on the unencapsulated portion of at least one of the wire bonds.
The step of forming the encapsulation layer can include depositing a dielectric material mass over the first surface and substantially all of the wire bonds and removing a portion of the dielectric material mass to uncover portions of the wire bonds to define the unencapsulated portions thereof. In a variation, at least one of the wire bonds can extend in a loop joined to each of at least two of the conductive elements. The dielectric material mass can then be deposited so as to at least partially cover the first surface and the at least one wire bond loop, and removing a portion of the dielectric material mass can further include removing a portion of the at least one wire bond loop so as sever it into first and second wire bonds having respective free ends that are uncovered by the encapsulation layer to form the unencapsulated portions thereof. The loop can be formed by joining a first end of a wire to the conductive element, drawing the wire in a direction away from the first surface, then drawing the wire in at least a lateral direction along the first surface, and then drawing the wire to the second conductive element and joining the wire to the second conductive element.
The encapsulation layer can be formed on the in-process unit by pressing a dielectric material mass over the wire bonds from a location remote from the substrate and into contact with the first surface of the substrate such that the at least one of the wire bonds penetrates the dielectric material mass. The wire bonds can be made of wire consisting substantially of gold, copper, aluminum, or solder. The first wire bonds can include aluminum, and the wire bonds can be joined to the conductive element by wedge bonding. The step of forming the encapsulation layer can additionally or alternatively include forming at least one cavity extending from a major surface of the encapsulation layer toward the substrate, the at least one cavity surrounding the unencapsulated portion of one of the wire bonds. The at least one cavity can be formed after depositing a dielectric encapsulation material onto the substrate by at least one of wet etching, dry etching, or laser etching the encapsulation material. The at least one cavity can further be formed by removing at least a portion of a mass of sacrificial material from a predetermined location of at least one of the wire bonds after depositing a dielectric encapsulation material onto the substrate and the at least one wire bond. The step of forming the encapsulation layer can be carried out such that a portion of the mass of sacrificial material is exposed on a major surface of the encapsulation layer, the exposed portion of the mass of sacrificial material surrounding a portion of the wire bond near the free end thereof and spacing apart a portion of the encapsulation layer therefrom. At least one of the wire bonds can define a longitudinal axis along a length thereof, and each wire bond can include an inner layer of a first material extending along the longitudinal axis and an outer layer formed by the mass of sacrificial material remote from the longitudinal axis and having a length extending in a lengthwise direction of such wire bond. A first portion of the mass of sacrificial material can be removed to form the cavity with a second portion of the mass of sacrificial material remaining adjacent to the base.
The first surface of the substrate can extend in lateral directions, and the unencapsulated portion of at least one of the wire bonds can be formed such that the end surface thereof is displaced in at least one of the lateral directions from the conductive element to which the at least one wire bond is joined. Accordingly, the in-process unit can be formed including a step of forming the wire bonds such that at least one of the wire bonds includes a substantially curved segment positioned between the conductive element and the end surface of the at least one wire bond.
In a further variation, the substrate can include a first region and a second region, and the microelectronic element can overlie the first region and can have a major surface remote from the substrate. The first conductive element can be disposed within the second region, and the in-process unit can be formed including a step of forming the wire bonds such that at least a portion of at least one of the wire bonds extends over the major surface of the microelectronic element.
The wire bonds can define a longitudinal axis along a length thereof, and the wire bonds can include an inner layer of a first material extending along the longitudinal axis and an outer layer of a second material remote from the longitudinal axis and extending along the length of the wire bond. In such a variation, the first material can be copper and the second material can be solder. A portion of the second material can be removed after the step of forming the encapsulation layer to form a cavity extending from a surface of the dielectric layer to uncover a portion of the edge surface of the inner layer of the wire bond.
A further embodiment of the present disclosure relates to a microelectronic package including a substrate having a first region and a second region, the substrate having a first surface and a second surface remote from the first surface. At least one microelectronic element overlies the first surface within the first region, and electrically conductive elements are exposed at the first surface of the substrate within the second region with at least some of the conductive elements electrically connected to the at least one microelectronic element. A plurality of bond elements, each having a first base, a second base, and an edge surface extending between the bases, the first base are joined to one of the conductive elements. The edge surface includes a first portion that extends away from the contact pad to an apex of the edge surface remote from the substrate. The edge surface further includes a second portion that extends from the apex to the second base, which is joined to a feature of the substrate. A dielectric encapsulation layer extends from at least one of the first or second surfaces and fills spaces between the first and second portions of the bond elements and between the plurality of bond elements such that the bond elements are separated from one another by the encapsulation layer. The encapsulation layer overlies at least the second region of the substrate. Unencapsulated portions of the bond elements are defined by at least portions of the edge surfaces of the bond elements surrounding the apexes thereof that are uncovered by the encapsulation layer.
In a variation of the above embodiment, the bond elements are wire bonds. In such a variation, the feature of the substrate to which the second base of the substrate is joined can be the conductive element to which the first base is joined. Alternatively, the feature of the substrate to which the second base is joined can be a respective conductive element different from the conductive element to which the first base is joined. Such a conductive element to which the second base is joined can be not electrically connected to the microelectronic element. In an alternative variation, the bond element can be a bond ribbon. In such a variation, a portion of the first base can extend along a portion of the respective contact pad, and the feature to which the second base is joined can be the length of the first base that extends along a portion of the respective contact pad.
In the embodiment, the first surface of the substrate can extend in first and second lateral directions, each lateral direction being transverse to a direction of a thickness of the substrate between the first and second surfaces. The unencapsulated portion of at least one of the wire bonds can then be displaced in at least one of the lateral directions from the conductive element to which the at least one wire bond is joined. Further, the unencapsulated portion of the at least one wire bond can overlie a major surface of the microelectronic element.
A further embodiment of the present disclosure can relate to a method of making a microelectronic assembly. The method of this embodiment can include joining a first microelectronic package made according to the above embodiment with a second microelectronic package, the second microelectronic package can include a substrate having a first surface and a plurality of contacts exposed at the first surface of the substrate, and joining the first microelectronic package with the second microelectronic package can include electrically and mechanically connecting the unencapsulated portions of the wire bonds of the first microelectronic package with the contacts of the second microelectronic package.
A further embodiment of the present invention can relate to an alternative method of making a microelectronic package. The method of this embodiment includes positioning a dielectric material mass over an in-process unit that includes a substrate having a first surface and a second surface remote therefrom, a plurality of thin conductive elements exposed at the first surface, and wire bonds having bases joined to at respective ones of the thin conductive elements and end surfaces remote from the substrate and remote from the bases. Each wire bond defines an edge surface extending between the base and the end surface thereof. The method also includes forming an encapsulation layer on the in-process unit by pressing the dielectric material mass over the wire bond into contact with the first surface of the substrate such that the wire bonds penetrate the dielectric material mass. The encapsulation layer, thus, fills spaces between the wire bonds such that the wire bonds are separated from one another both the encapsulation layer with the encapsulation layer overlying at least the second region of the substrate. Unencapsulated portions of the first wire bonds are formed by the wire bonds extending through a portion of the encapsulation layer such that portions of the first wire bonds are uncovered by the encapsulation layer.
A still further embodiment of the present disclosure relates to an alternative method for making a microelectronic package. The method of this embodiment includes forming a dielectric encapsulation layer on an in-process unit that includes a substrate having a first surface and a second surface remote therefrom, a plurality of thin conductive elements exposed at the first surface, and wire loops joined at a first base and a second base to respective ones of at least two of the thin conductive elements. The encapsulation is being formed so as to at least partially cover the first surface and the at least one wire loop. The method further includes removing a portion of the encapsulation layer and a portion of the wire loops so as sever each of the wire loops into separate wire bonds corresponding to a respective one of the first and second bases. The wire bonds, thus, have end surfaces remote from the substrate and remote from the bases, and each wire bond defines an edge surface extending between the base and the end surface thereof. The encapsulation layer fills spaces between the wire bonds such that the wire bonds are separated from one another by the encapsulation layer. The wire bonds have unencapsulated portions formed by free ends thereof that are at least partially uncovered by the encapsulation layer.
Another embodiment of the present disclosure relates to system that includes a microelectronic package or assembly according to one of the embodiments thereof discussed above and one or more other electronic components electrically connected to the microelectronic package. The system can further include a housing, in which the microelectronic package or assembly and the other electronic components can be mounted.
Turning now to the figures, where similar numeric references are used to indicate similar features, there is shown in
The microelectronic assembly 10 of
In a preferred embodiment, substrate 12 is considered as divided into a first region 18 and a second region 20. The first region 18 lies within the second region 20 and includes a central portion of the substrate 12 and extends outwardly therefrom. The second region 20 substantially surrounds the first region 18 and extends outwardly therefrom to the outer edges of the substrate 12. In this embodiment, no specific characteristic of the substrate itself physically divides the two regions; however, the regions are demarked for purposes of discussion herein with respect to treatments or features applied thereto or contained therein.
A microelectronic element 22 can be mounted to first surface 14 of substrate 12 within first region 18. Microelectronic element 22 can be a semiconductor chip or another comparable device. In the embodiment of
Conductive elements 28 include respective “contacts” or pads 30 that are exposed at the first surface 14 of substrate 12. As used in the present description, when an electrically conductive element is described as being “exposed at” the surface of another element having dielectric structure, it indicates that the electrically conductive structure is available for contact with a theoretical point moving in a direction perpendicular to the surface of the dielectric structure toward the surface of the dielectric structure from outside the dielectric structure. Thus, a terminal or other conductive structure that is exposed at a surface of a dielectric structure may project from such surface; may be flush with such surface; or may be recessed relative to such surface and exposed through a hole or depression in the dielectric. The conductive elements 28 can be flat, thin elements in which pad 30 is exposed at first surface 14 of substrate 12. In one embodiment, conductive elements 28 can be substantially circular and can be interconnected between each other or to microelectronic element 22 by traces (not shown). Conductive elements 28 can be formed at least within second region 20 of substrate 12. Additionally, in certain embodiments, conductive elements 28 can also be formed within first region 18. Such an arrangement is particularly useful when mounting microelectronic element 122 (
In an embodiment, conductive elements 28 are formed from a solid metal material such as copper, gold, nickel, or other materials that are acceptable for such an application, including various alloys including one or more of copper, gold, nickel or combinations thereof.
At least some of conductive elements 28 can be interconnected to corresponding second conductive elements 40, such as conductive pads, exposed at second surface 16 of substrate 12. Such an interconnection can be completed using vias 41 formed in substrate 12 that can be lined or filled with conductive metal that can be of the same material as conductive elements 28 and 40. Optionally, conductive elements 40 can be further interconnected by traces on substrate 12.
Microelectronic assembly 10 further includes a plurality of wire bonds 32 joined to at least some of the conductive elements 28, such as on the pads 30 thereof. Wire bonds 32 are joined at a base 34 thereof to the conductive elements 28 and can extend to a free end 36 remote from the respective bases 34 and from substrate 12. The ends 36 of wire bonds 32 are characterized as being free in that they are not electrically connected or otherwise joined to microelectronic element 22 or any other conductive features within microelectronic assembly 10 that are, in turn, connected to microelectronic element 22. In other words, free ends 36 are available for electronic connection, either directly or indirectly as through a solder ball or other features discussed herein, to a conductive feature external to assembly 10. The fact that ends 36 held in a predetermined position by, for example, encapsulant layer 42 or otherwise joined or electrically connected to another conductive feature does not mean that they are not “free” as described herein, so long as any such feature is not electrically connected to microelectronic element 22. Conversely, base 34 is not free as it is either directly or indirectly electrically connected to microelectronic element 22, as described herein. As shown in
Wire bond 32 can be made from a conductive material such as copper, gold, nickel, solder, aluminum or the like. Additionally, wire bonds 32 can be made from combinations of materials, such as from a core of a conductive material, such as copper or aluminum, for example, with a coating applied over the core. The coating can be of a second conductive material, such as aluminum, nickel or the like. Alternatively, the coating can be of an insulating material, such as an insulating jacket. In an embodiment, the wire used to form wire bonds 32 can have a thickness, i.e., in a dimension transverse to the wire's length, of between about 15 μm and 150 μm. In other embodiments, including those in which wedge bonding is used, wire bonds 32 can have a thickness of up to about 500 μm. In general, a wire bond is formed on a conductive element, such as conductive element 28, a pad, trace or the like, using specialized equipment that is known in the art. A leading end of a wire segment is heated and pressed against the receiving surface to which the wire segment bonds, typically forming a ball or ball-like base 34 joined to the surface of the conductive element 28. The desired length of the wire segment to form the wire bond is drawn out of the bonding tool, which can then cut the wire bond at the desired length. Wedge bonding, which can be used to form wire bonds of aluminum, for example, is a process in which the heated portion of the wire is dragged across the receiving surface to form a wedge that lies generally parallel to the surface. The wedge-bonded wire bond can then be bent upward, if necessary, and extended to the desired length or position before cutting. In a particular embodiment, the wire used to form a wire bond can be cylindrical in cross-section. Otherwise, the wire fed from the tool to form a wire bond or wedge-bonded wire bond may have a polygonal cross-section such as rectangular or trapezoidal, for example.
The free end 36 of wire bond 32 has an end surface 38. End surface 38 can form at least a part of a contact in an array formed by respective end surfaces 38 of a plurality of wire bonds 32.
Microelectronic assembly 10 further includes an encapsulation layer 42 formed from a dielectric material. In the embodiment of
Encapsulation layer 42 serves to protect the other elements within microelectronic assembly 10, particularly wire bonds 32. This allows for a more robust structure that is less likely to be damaged by testing thereof or during transportation or assembly to other microelectronic structures. Encapsulation layer 42 can be formed from a dielectric material with insulating properties such as that described in U.S. Patent App. Pub. No. 2010/0232129, which is incorporated by reference herein in its entirety.
In an embodiment, various ones of wire bonds 132 can be displaced in different directions and by different amounts throughout the assembly 110. Such an arrangement allows for assembly 110 to have an array that is configured differently on the level of surface 144 compared to on the level of substrate 12. For example, an array can cover a smaller overall area or have a smaller pitch on surface 144 than at the first surface 114 level compared to that at first surface 114 of substrate 112. Further, some wire bonds 132 can have ends 138 that are positioned above microelectronic element 122 to accommodate a stacked arrangement of packaged microelectronic elements of different sizes. In another example, shown in
Curved portion 248 can take on a variety of shapes, as needed, to achieve the desired positions of the ends 236 of the wire bonds 232. For example, curved portions 248 can be formed as S-curves of various shapes, such as that which is shown in
A further variation of a wire bond 332D is shown that is configured to be uncovered by encapsulation layer 342 on a side surface 47 thereof. In the embodiment shown free end 336D is uncovered, however, a portion of edge surface 337D can additionally or alternatively be uncovered by encapsulation layer 342. Such a configuration can be used for grounding of microelectronic assembly 10 by electrical connection to an appropriate feature or for mechanical or electrical connection to other featured disposed laterally to microelectronic assembly 310. Additionally,
In the exemplary configuration in
The wire bond configuration shown in
Cavity 64 can be formed by removing a portion of encapsulation layer 42 in the desired area of cavity 64. This can be done by known processes including, laser etching, wet etching, lapping or the like. Alternatively, in an embodiment where encapsulation layer 42 is formed by injection molding, cavity 64 can be formed by including a corresponding feature in the mold. Such a process is discussed in U.S. Pat. App. Pub. No. 2010/0232129, which is hereby incorporated by reference in its entirety. The tapered shape of cavity 64 shown in
A rounded end portion 70 can be formed by applying localized heat in the form of a flame or a spark at the end of the wire used to make wire bond 32. Known wire bonding machines can be modified to carry out this step, which can be done immediately after cutting the wire. In this process, the heat melts the wire at the end thereof. This localized portion of liquid metal is made round by the surface tension thereof and is retained when the metal cools.
In
In the embodiment shown in
In an alternative embodiment shown in
In
Alternatively, sacrificial material mass 78 can be formed to coat substantially all of wire bond 32 by extending along the edge surface 37 thereof. This arrangement is shown in
The structures discussed above can be utilized in construction of diverse electronic systems. For example, a system 711 in accordance with a further embodiment of the invention includes microelectronic assembly 710, as described above, in conjunction with other electronic components 713 and 715. In the example depicted, component 713 is a semiconductor chip whereas component 715 is a display screen, but any other components can be used. Of course, although only two additional components are depicted in
Microelectronic assembly 710 and components 713 and 715 are mounted in a common housing 719, schematically depicted in broken lines, and are electrically interconnected with one another as necessary to form the desired circuit. In the exemplary system shown, the system includes a circuit panel 717 such as a flexible printed circuit board, and the circuit panel includes numerous conductors 721, of which only one is depicted in
The housing 719 is depicted as a portable housing of the type usable, for example, in a cellular telephone or personal digital assistant, and screen 715 is exposed at the surface of the housing. Where microelectronic assembly 710 includes a light-sensitive element such as an imaging chip, a lens 723 or other optical device also may be provided for routing light to the structure. Again, the simplified system shown in
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2011-0041843 | May 2011 | KR | national |
The present application is a continuation of U.S. patent application Ser. No. 13/792,521, filed Mar. 11, 2013, which is a divisional of U.S. patent application Ser. No. 13/462,158, filed May 2, 2012, (which issued Dec. 31, 2013, U.S. Pat. No. 8,618,659) which claims the benefit of the filing date of Korean Patent Application No. 10-2011-0041843, filed May 3, 2011, the disclosures of which are incorporated herein by reference.
| Number | Name | Date | Kind |
|---|---|---|---|
| 3289452 | Koellner | Dec 1966 | A |
| 3358897 | Christensen | Dec 1967 | A |
| 3623649 | Keisling | Nov 1971 | A |
| 3795037 | Luttmer | Mar 1974 | A |
| 3900153 | Beerwerth et al. | Aug 1975 | A |
| 4327860 | Kirshenboin et al. | May 1982 | A |
| 4422568 | Elles et al. | Dec 1983 | A |
| 4437604 | Razon et al. | Mar 1984 | A |
| 4604644 | Beckham et al. | Aug 1986 | A |
| 4695870 | Patraw | Sep 1987 | A |
| 4716049 | Patraw | Dec 1987 | A |
| 4771930 | Gillotti et al. | Sep 1988 | A |
| 4793814 | Zifcak et al. | Dec 1988 | A |
| 4804132 | DiFrancesco | Feb 1989 | A |
| 4845354 | Gupta et al. | Jul 1989 | A |
| 4902600 | Tamagawa et al. | Feb 1990 | A |
| 4924353 | Patraw | May 1990 | A |
| 4975079 | Beaman et al. | Dec 1990 | A |
| 4982265 | Watanabe et al. | Jan 1991 | A |
| 4998885 | Beaman | Mar 1991 | A |
| 4999472 | Neinast et al. | Mar 1991 | A |
| 5067382 | Zimmerman et al. | Nov 1991 | A |
| 5083697 | Difrancesco | Jan 1992 | A |
| 5095187 | Gliga | Mar 1992 | A |
| 5138438 | Masayuki et al. | Aug 1992 | A |
| 5148265 | Khandros et al. | Sep 1992 | A |
| 5148266 | Khandros et al. | Sep 1992 | A |
| 5186381 | Kim | Feb 1993 | A |
| 5189505 | Bartelink | Feb 1993 | A |
| 5196726 | Nishiguchi et al. | Mar 1993 | A |
| 5214308 | Nishiguchi et al. | May 1993 | A |
| 5220489 | Barreto et al. | Jun 1993 | A |
| 5222014 | Lin | Jun 1993 | A |
| 5340771 | Rostoker | Aug 1994 | A |
| 5346118 | Degani et al. | Sep 1994 | A |
| 5371654 | Beaman et al. | Dec 1994 | A |
| 5397997 | Tuckerman et al. | Mar 1995 | A |
| 5438224 | Papageorge et al. | Aug 1995 | A |
| 5455390 | DiStefano et al. | Oct 1995 | A |
| 5468995 | Higgins, III | Nov 1995 | A |
| 5494667 | Uchida et al. | Feb 1996 | A |
| 5495667 | Farnworth et al. | Mar 1996 | A |
| 5518964 | DiStefano et al. | May 1996 | A |
| 5531022 | Beaman et al. | Jul 1996 | A |
| 5536909 | DiStefano et al. | Jul 1996 | A |
| 5541567 | Fogel et al. | Jul 1996 | A |
| 5571428 | Nishimura et al. | Nov 1996 | A |
| 5608265 | Kitano et al. | Mar 1997 | A |
| 5615824 | Fjelstad et al. | Apr 1997 | A |
| 5635846 | Beaman et al. | Jun 1997 | A |
| 5656550 | Tsuji et al. | Aug 1997 | A |
| 5659952 | Kovac et al. | Aug 1997 | A |
| 5679977 | Khandros et al. | Oct 1997 | A |
| 5688716 | DiStefano et al. | Nov 1997 | A |
| 5718361 | Braun et al. | Feb 1998 | A |
| 5726493 | Yamashita et al. | Mar 1998 | A |
| 5731709 | Pastore et al. | Mar 1998 | A |
| 5736780 | Murayama | Apr 1998 | A |
| 5787581 | DiStefano et al. | Aug 1998 | A |
| 5801441 | DiStefano et al. | Sep 1998 | A |
| 5802699 | Fjelstad et al. | Sep 1998 | A |
| 5811982 | Beaman et al. | Sep 1998 | A |
| 5821763 | Beaman et al. | Oct 1998 | A |
| 5831836 | Long et al. | Nov 1998 | A |
| 5839191 | Economy et al. | Nov 1998 | A |
| 5854507 | Miremadi et al. | Dec 1998 | A |
| 5898991 | Fogel et al. | May 1999 | A |
| 5912505 | Itoh et al. | Jun 1999 | A |
| 5953624 | Bando et al. | Sep 1999 | A |
| 5971253 | Gilleo et al. | Oct 1999 | A |
| 5973391 | Bischoff et al. | Oct 1999 | A |
| 5977618 | DiStefano et al. | Nov 1999 | A |
| 5980270 | Fjelstad et al. | Nov 1999 | A |
| 5989936 | Smith et al. | Nov 1999 | A |
| 5994152 | Khandros et al. | Nov 1999 | A |
| 6000126 | Pai | Dec 1999 | A |
| 6002168 | Bellaar et al. | Dec 1999 | A |
| 6032359 | Carroll | Mar 2000 | A |
| 6038136 | Weber | Mar 2000 | A |
| 6052287 | Palmer et al. | Apr 2000 | A |
| 6054337 | Solberg | Apr 2000 | A |
| 6054756 | DiStefano et al. | Apr 2000 | A |
| 6077380 | Hayes et al. | Jun 2000 | A |
| 6117694 | Smith et al. | Sep 2000 | A |
| 6121676 | Solberg | Sep 2000 | A |
| 6124546 | Hayward et al. | Sep 2000 | A |
| 6133072 | Fjelstad | Oct 2000 | A |
| 6145733 | Streckfuss et al. | Nov 2000 | A |
| 6157080 | Tamaki et al. | Dec 2000 | A |
| 6158647 | Chapman et al. | Dec 2000 | A |
| 6164523 | Fauty et al. | Dec 2000 | A |
| 6168965 | Malinovich et al. | Jan 2001 | B1 |
| 6177636 | Fjelstad | Jan 2001 | B1 |
| 6194250 | Melton et al. | Feb 2001 | B1 |
| 6194291 | DiStefano et al. | Feb 2001 | B1 |
| 6202297 | Faraci et al. | Mar 2001 | B1 |
| 6206273 | Beaman et al. | Mar 2001 | B1 |
| 6208024 | DiStefano | Mar 2001 | B1 |
| 6211572 | Fjelstad et al. | Apr 2001 | B1 |
| 6215670 | Khandros | Apr 2001 | B1 |
| 6218728 | Kimura | Apr 2001 | B1 |
| 6225688 | Kim et al. | May 2001 | B1 |
| 6258625 | Brofman et al. | Jul 2001 | B1 |
| 6260264 | Chen et al. | Jul 2001 | B1 |
| 6262482 | Shiraishi et al. | Jul 2001 | B1 |
| 6268662 | Test et al. | Jul 2001 | B1 |
| 6295729 | Beaman et al. | Oct 2001 | B1 |
| 6300780 | Beaman et al. | Oct 2001 | B1 |
| 6303997 | Lee | Oct 2001 | B1 |
| 6313528 | Solberg | Nov 2001 | B1 |
| 6316838 | Ozawa et al. | Nov 2001 | B1 |
| 6332270 | Beaman et al. | Dec 2001 | B2 |
| 6334247 | Beaman et al. | Jan 2002 | B1 |
| 6358627 | Benenati et al. | Mar 2002 | B2 |
| 6362520 | DiStefano | Mar 2002 | B2 |
| 6362525 | Rahim | Mar 2002 | B1 |
| 6376769 | Chung | Apr 2002 | B1 |
| 6388333 | Taniguchi et al. | May 2002 | B1 |
| 6407448 | Chun | Jun 2002 | B2 |
| 6413850 | Ooroku et al. | Jul 2002 | B1 |
| 6439450 | Chapman et al. | Aug 2002 | B1 |
| 6458411 | Goossen et al. | Oct 2002 | B1 |
| 6476503 | Imamura et al. | Nov 2002 | B1 |
| 6476583 | McAndrews | Nov 2002 | B2 |
| 6489182 | Kwon | Dec 2002 | B2 |
| 6495914 | Sekine et al. | Dec 2002 | B1 |
| 6507104 | Ho et al. | Jan 2003 | B2 |
| 6509639 | Lin | Jan 2003 | B1 |
| 6514847 | Ohsawa et al. | Feb 2003 | B1 |
| 6515355 | Jiang et al. | Feb 2003 | B1 |
| 6522018 | Tay et al. | Feb 2003 | B1 |
| 6526655 | Beaman et al. | Mar 2003 | B2 |
| 6531784 | Shim et al. | Mar 2003 | B1 |
| 6545228 | Hashimoto | Apr 2003 | B2 |
| 6550666 | Chew et al. | Apr 2003 | B2 |
| 6555918 | Masuda et al. | Apr 2003 | B2 |
| 6560117 | Moon | May 2003 | B2 |
| 6573458 | Matsubara et al. | Jun 2003 | B1 |
| 6578754 | Tung | Jun 2003 | B1 |
| 6581283 | Sugiura et al. | Jun 2003 | B2 |
| 6624653 | Cram | Sep 2003 | B1 |
| 6630730 | Grigg | Oct 2003 | B2 |
| 6647310 | Yi et al. | Nov 2003 | B1 |
| 6684007 | Yoshimura et al. | Jan 2004 | B2 |
| 6687988 | Sugiura et al. | Feb 2004 | B1 |
| 6699730 | Kim et al. | Mar 2004 | B2 |
| 6708403 | Beaman et al. | Mar 2004 | B2 |
| 6730544 | Yang | May 2004 | B1 |
| 6734542 | Nakatani et al. | May 2004 | B2 |
| 6746894 | Fee et al. | Jun 2004 | B2 |
| 6759738 | Fallon et al. | Jul 2004 | B1 |
| 6762078 | Shin et al. | Jul 2004 | B2 |
| 6765287 | Lin | Jul 2004 | B1 |
| 6774467 | Horiuchi et al. | Aug 2004 | B2 |
| 6774473 | Shen | Aug 2004 | B1 |
| 6774494 | Arakawa | Aug 2004 | B2 |
| 6777787 | Shibata | Aug 2004 | B2 |
| 6778406 | Grube et al. | Aug 2004 | B2 |
| 6790757 | Chittipeddi et al. | Sep 2004 | B1 |
| 6815257 | Yoon et al. | Nov 2004 | B2 |
| 6828668 | Smith et al. | Dec 2004 | B2 |
| 6844619 | Tago | Jan 2005 | B2 |
| 6856235 | Fjelstad | Feb 2005 | B2 |
| 6867499 | Tabrizi | Mar 2005 | B1 |
| 6900530 | Tsai | May 2005 | B1 |
| 6902869 | Appelt et al. | Jun 2005 | B2 |
| 6902950 | Ma et al. | Jun 2005 | B2 |
| 6930256 | Huemoeller et al. | Aug 2005 | B1 |
| 6933608 | Fujisawa | Aug 2005 | B2 |
| 6946380 | Takahashi | Sep 2005 | B2 |
| 6962282 | Manansala | Nov 2005 | B2 |
| 6962864 | Jeng et al. | Nov 2005 | B1 |
| 6979599 | Silverbrook | Dec 2005 | B2 |
| 6987032 | Fan et al. | Jan 2006 | B1 |
| 7009297 | Chiang et al. | Mar 2006 | B1 |
| 7045884 | Standing | May 2006 | B2 |
| 7061079 | Weng et al. | Jun 2006 | B2 |
| 7061097 | Yokoi | Jun 2006 | B2 |
| 7067911 | Lin et al. | Jun 2006 | B1 |
| 7119427 | Kim | Oct 2006 | B2 |
| 7121891 | Cherian | Oct 2006 | B2 |
| 7170185 | Hogerton et al. | Jan 2007 | B1 |
| 7176506 | Beroz et al. | Feb 2007 | B2 |
| 7176559 | Ho et al. | Feb 2007 | B2 |
| 7185426 | Hiner et al. | Mar 2007 | B1 |
| 7190061 | Lee | Mar 2007 | B2 |
| 7215033 | Lee et al. | May 2007 | B2 |
| 7225538 | Eldridge et al. | Jun 2007 | B2 |
| 7227095 | Roberts et al. | Jun 2007 | B2 |
| 7229906 | Babinetz et al. | Jun 2007 | B2 |
| 7233057 | Hussa | Jun 2007 | B2 |
| 7242081 | Lee | Jul 2007 | B1 |
| 7262124 | Fujisawa | Aug 2007 | B2 |
| 7294928 | Bang et al. | Nov 2007 | B2 |
| 7323767 | James et al. | Jan 2008 | B2 |
| 7365416 | Kawabata et al. | Apr 2008 | B2 |
| 7371676 | Hembree | May 2008 | B2 |
| 7372151 | Fan et al. | May 2008 | B1 |
| 7391105 | Yeom | Jun 2008 | B2 |
| 7391121 | Otremba | Jun 2008 | B2 |
| 7416107 | Chapman et al. | Aug 2008 | B2 |
| 7456091 | Kuraya et al. | Nov 2008 | B2 |
| 7476608 | Craig et al. | Jan 2009 | B2 |
| 7476962 | Kim | Jan 2009 | B2 |
| 7485562 | Chua et al. | Feb 2009 | B2 |
| 7495342 | Beaman et al. | Feb 2009 | B2 |
| 7517733 | Camacho et al. | Apr 2009 | B2 |
| 7538565 | Beaman et al. | May 2009 | B1 |
| 7550836 | Chou et al. | Jun 2009 | B2 |
| 7576439 | Craig et al. | Aug 2009 | B2 |
| 7578422 | Lange et al. | Aug 2009 | B2 |
| 7589394 | Kawano | Sep 2009 | B2 |
| 7621436 | Mii et al. | Nov 2009 | B2 |
| 7625781 | Beer | Dec 2009 | B2 |
| 7633765 | Scanlan et al. | Dec 2009 | B1 |
| 7642133 | Wu et al. | Jan 2010 | B2 |
| 7646102 | Boon | Jan 2010 | B2 |
| 7671457 | Hiner et al. | Mar 2010 | B1 |
| 7671459 | Corisis et al. | Mar 2010 | B2 |
| 7675152 | Gerber et al. | Mar 2010 | B2 |
| 7677429 | Chapman et al. | Mar 2010 | B2 |
| 7682962 | Hembree | Mar 2010 | B2 |
| 7719122 | Tsao et al. | May 2010 | B2 |
| 7728443 | Hembree | Jun 2010 | B2 |
| 7737545 | Fjelstad et al. | Jun 2010 | B2 |
| 7750483 | Lin et al. | Jul 2010 | B1 |
| 7757385 | Hembree | Jul 2010 | B2 |
| 7777351 | Berry et al. | Aug 2010 | B1 |
| 7780064 | Wong et al. | Aug 2010 | B2 |
| 7781877 | Jiang et al. | Aug 2010 | B2 |
| 7795717 | Goller | Sep 2010 | B2 |
| 7808093 | Kagaya et al. | Oct 2010 | B2 |
| 7842541 | Rusli et al. | Nov 2010 | B1 |
| 7850087 | Hwang et al. | Dec 2010 | B2 |
| 7855462 | Boon et al. | Dec 2010 | B2 |
| 7880290 | Park | Feb 2011 | B2 |
| 7892889 | Howard et al. | Feb 2011 | B2 |
| 7902644 | Huang et al. | Mar 2011 | B2 |
| 7919846 | Hembree | Apr 2011 | B2 |
| 7928552 | Cho et al. | Apr 2011 | B1 |
| 7932170 | Huemoeller et al. | Apr 2011 | B1 |
| 7934313 | Lin et al. | May 2011 | B1 |
| 7964956 | Bet-Shliemoun | Jun 2011 | B1 |
| 7967062 | Campbell et al. | Jun 2011 | B2 |
| 7977597 | Roberts et al. | Jul 2011 | B2 |
| 8012797 | Shen et al. | Sep 2011 | B2 |
| 8020290 | Sheats | Sep 2011 | B2 |
| 8035213 | Lee et al. | Oct 2011 | B2 |
| 8039970 | Yamamori et al. | Oct 2011 | B2 |
| 8071431 | Hoang et al. | Dec 2011 | B2 |
| 8071470 | Khor et al. | Dec 2011 | B2 |
| 8084867 | Tang et al. | Dec 2011 | B2 |
| 8092734 | Jiang et al. | Jan 2012 | B2 |
| 8093697 | Haba et al. | Jan 2012 | B2 |
| 8213184 | Knickerbocker | Jul 2012 | B2 |
| 8217502 | Ko | Jul 2012 | B2 |
| 8232141 | Choi et al. | Jul 2012 | B2 |
| 8264091 | Cho et al. | Sep 2012 | B2 |
| 8278746 | Ding et al. | Oct 2012 | B2 |
| 8304900 | Jang et al. | Nov 2012 | B2 |
| 8314492 | Egawa | Nov 2012 | B2 |
| 8319338 | Berry et al. | Nov 2012 | B1 |
| 8482111 | Haba | Jul 2013 | B2 |
| 8525314 | Haba et al. | Sep 2013 | B2 |
| 8525318 | Kim et al. | Sep 2013 | B1 |
| 8659164 | Haba | Feb 2014 | B2 |
| 8680684 | Haba et al. | Mar 2014 | B2 |
| 8728865 | Haba et al. | May 2014 | B2 |
| 8878353 | Haba et al. | Nov 2014 | B2 |
| 8927337 | Haba et al. | Jan 2015 | B2 |
| 20010002607 | Sugiura et al. | Jun 2001 | A1 |
| 20010007370 | Distefano | Jul 2001 | A1 |
| 20010021541 | Akram et al. | Sep 2001 | A1 |
| 20010028114 | Hosomi | Oct 2001 | A1 |
| 20010045012 | Beaman et al. | Nov 2001 | A1 |
| 20010048151 | Chun | Dec 2001 | A1 |
| 20020014004 | Beaman et al. | Feb 2002 | A1 |
| 20020066952 | Taniguchi et al. | Jun 2002 | A1 |
| 20020117330 | Eldridge et al. | Aug 2002 | A1 |
| 20020125571 | Corisis et al. | Sep 2002 | A1 |
| 20020153602 | Tay et al. | Oct 2002 | A1 |
| 20020164838 | Moon et al. | Nov 2002 | A1 |
| 20020171152 | Miyazaki | Nov 2002 | A1 |
| 20020185735 | Sakurai et al. | Dec 2002 | A1 |
| 20030002770 | Chakravorty et al. | Jan 2003 | A1 |
| 20030006494 | Lee et al. | Jan 2003 | A1 |
| 20030048108 | Beaman et al. | Mar 2003 | A1 |
| 20030057544 | Nathan et al. | Mar 2003 | A1 |
| 20030094666 | Clayton et al. | May 2003 | A1 |
| 20030094700 | Aiba et al. | May 2003 | A1 |
| 20030106213 | Beaman et al. | Jun 2003 | A1 |
| 20030124767 | Lee et al. | Jul 2003 | A1 |
| 20030162378 | Mikami | Aug 2003 | A1 |
| 20030164540 | Lee et al. | Sep 2003 | A1 |
| 20040014309 | Nakanishi | Jan 2004 | A1 |
| 20040036164 | Koike et al. | Feb 2004 | A1 |
| 20040038447 | Corisis et al. | Feb 2004 | A1 |
| 20040075164 | Pu et al. | Apr 2004 | A1 |
| 20040090756 | Ho et al. | May 2004 | A1 |
| 20040110319 | Fukutomi et al. | Jun 2004 | A1 |
| 20040119152 | Karnezos et al. | Jun 2004 | A1 |
| 20040124518 | Karnezos | Jul 2004 | A1 |
| 20040148773 | Beaman et al. | Aug 2004 | A1 |
| 20040152292 | Babinetz et al. | Aug 2004 | A1 |
| 20040160751 | Inagaki et al. | Aug 2004 | A1 |
| 20040188499 | Nosaka | Sep 2004 | A1 |
| 20040262728 | Sterrett et al. | Dec 2004 | A1 |
| 20040262734 | Yoo | Dec 2004 | A1 |
| 20050017369 | Clayton et al. | Jan 2005 | A1 |
| 20050035440 | Mohammed | Feb 2005 | A1 |
| 20050062492 | Beaman et al. | Mar 2005 | A1 |
| 20050082664 | Funaba et al. | Apr 2005 | A1 |
| 20050095835 | Humpston et al. | May 2005 | A1 |
| 20050116326 | Haba et al. | Jun 2005 | A1 |
| 20050121764 | Mallik et al. | Jun 2005 | A1 |
| 20050133916 | Karnezos | Jun 2005 | A1 |
| 20050133932 | Pohl et al. | Jun 2005 | A1 |
| 20050140265 | Hirakata | Jun 2005 | A1 |
| 20050151235 | Yokoi | Jul 2005 | A1 |
| 20050151238 | Yamunan | Jul 2005 | A1 |
| 20050173805 | Damberg et al. | Aug 2005 | A1 |
| 20050173807 | Zhu et al. | Aug 2005 | A1 |
| 20050181544 | Haba et al. | Aug 2005 | A1 |
| 20050181655 | Haba et al. | Aug 2005 | A1 |
| 20050212109 | Cherukuri et al. | Sep 2005 | A1 |
| 20050253213 | Jiang et al. | Nov 2005 | A1 |
| 20050266672 | Jeng et al. | Dec 2005 | A1 |
| 20050285246 | Haba et al. | Dec 2005 | A1 |
| 20060118641 | Hwang et al. | Jun 2006 | A1 |
| 20060166397 | Lau et al. | Jul 2006 | A1 |
| 20060197220 | Beer | Sep 2006 | A1 |
| 20060255449 | Lee et al. | Nov 2006 | A1 |
| 20060278682 | Lange et al. | Dec 2006 | A1 |
| 20060278970 | Yano et al. | Dec 2006 | A1 |
| 20070015353 | Craig et al. | Jan 2007 | A1 |
| 20070090524 | Abbott | Apr 2007 | A1 |
| 20070148822 | Haba et al. | Jun 2007 | A1 |
| 20070181989 | Corisis et al. | Aug 2007 | A1 |
| 20070190747 | Humpston et al. | Aug 2007 | A1 |
| 20070235850 | Gerber et al. | Oct 2007 | A1 |
| 20070235856 | Haba et al. | Oct 2007 | A1 |
| 20070241437 | Kagaya et al. | Oct 2007 | A1 |
| 20070254406 | Lee | Nov 2007 | A1 |
| 20070271781 | Beaman et al. | Nov 2007 | A9 |
| 20070290325 | Wu et al. | Dec 2007 | A1 |
| 20080006942 | Park et al. | Jan 2008 | A1 |
| 20080017968 | Choi et al. | Jan 2008 | A1 |
| 20080029849 | Hedler et al. | Feb 2008 | A1 |
| 20080032519 | Murata | Feb 2008 | A1 |
| 20080047741 | Beaman et al. | Feb 2008 | A1 |
| 20080048309 | Corisis et al. | Feb 2008 | A1 |
| 20080048690 | Beaman et al. | Feb 2008 | A1 |
| 20080048691 | Beaman et al. | Feb 2008 | A1 |
| 20080048697 | Beaman et al. | Feb 2008 | A1 |
| 20080054434 | Kim | Mar 2008 | A1 |
| 20080073769 | Wu et al. | Mar 2008 | A1 |
| 20080073771 | Seo et al. | Mar 2008 | A1 |
| 20080076208 | Wu et al. | Mar 2008 | A1 |
| 20080100316 | Beaman et al. | May 2008 | A1 |
| 20080100317 | Beaman et al. | May 2008 | A1 |
| 20080100318 | Beaman et al. | May 2008 | A1 |
| 20080100324 | Beaman et al. | May 2008 | A1 |
| 20080105984 | Lee | May 2008 | A1 |
| 20080106281 | Beaman et al. | May 2008 | A1 |
| 20080106282 | Beaman et al. | May 2008 | A1 |
| 20080106283 | Beaman et al. | May 2008 | A1 |
| 20080106284 | Beaman et al. | May 2008 | A1 |
| 20080106285 | Beaman et al. | May 2008 | A1 |
| 20080106291 | Beaman et al. | May 2008 | A1 |
| 20080106872 | Beaman et al. | May 2008 | A1 |
| 20080111568 | Beaman et al. | May 2008 | A1 |
| 20080111569 | Beaman et al. | May 2008 | A1 |
| 20080111570 | Beaman et al. | May 2008 | A1 |
| 20080112144 | Beaman et al. | May 2008 | A1 |
| 20080112145 | Beaman et al. | May 2008 | A1 |
| 20080112146 | Beaman et al. | May 2008 | A1 |
| 20080112147 | Beaman et al. | May 2008 | A1 |
| 20080112148 | Beaman et al. | May 2008 | A1 |
| 20080112149 | Beaman et al. | May 2008 | A1 |
| 20080116912 | Beaman et al. | May 2008 | A1 |
| 20080116913 | Beaman et al. | May 2008 | A1 |
| 20080116914 | Beaman et al. | May 2008 | A1 |
| 20080116915 | Beaman et al. | May 2008 | A1 |
| 20080116916 | Beaman et al. | May 2008 | A1 |
| 20080117611 | Beaman et al. | May 2008 | A1 |
| 20080117612 | Beaman et al. | May 2008 | A1 |
| 20080117613 | Beaman et al. | May 2008 | A1 |
| 20080121879 | Beaman et al. | May 2008 | A1 |
| 20080123310 | Beaman et al. | May 2008 | A1 |
| 20080129319 | Beaman et al. | Jun 2008 | A1 |
| 20080129320 | Beaman et al. | Jun 2008 | A1 |
| 20080132094 | Beaman et al. | Jun 2008 | A1 |
| 20080156518 | Honer et al. | Jul 2008 | A1 |
| 20080164595 | Wu et al. | Jul 2008 | A1 |
| 20080211084 | Chow et al. | Sep 2008 | A1 |
| 20080277772 | Groenhuis et al. | Nov 2008 | A1 |
| 20080284001 | Mori et al. | Nov 2008 | A1 |
| 20080284045 | Gerber et al. | Nov 2008 | A1 |
| 20080303132 | Mohammed et al. | Dec 2008 | A1 |
| 20080303153 | Oi et al. | Dec 2008 | A1 |
| 20080315385 | Gerber et al. | Dec 2008 | A1 |
| 20090014876 | Youn et al. | Jan 2009 | A1 |
| 20090026609 | Masuda | Jan 2009 | A1 |
| 20090032913 | Haba | Feb 2009 | A1 |
| 20090045497 | Kagaya et al. | Feb 2009 | A1 |
| 20090050994 | Ishihara et al. | Feb 2009 | A1 |
| 20090085185 | Byun et al. | Apr 2009 | A1 |
| 20090085205 | Sugizaki | Apr 2009 | A1 |
| 20090091009 | Corisis et al. | Apr 2009 | A1 |
| 20090102063 | Lee et al. | Apr 2009 | A1 |
| 20090104736 | Haba et al. | Apr 2009 | A1 |
| 20090127686 | Yang et al. | May 2009 | A1 |
| 20090128176 | Beaman et al. | May 2009 | A1 |
| 20090146301 | Shimizu et al. | Jun 2009 | A1 |
| 20090146303 | Kwon | Jun 2009 | A1 |
| 20090160065 | Haba et al. | Jun 2009 | A1 |
| 20090189288 | Beaman et al. | Jul 2009 | A1 |
| 20090206461 | Yoon | Aug 2009 | A1 |
| 20090212442 | Chow et al. | Aug 2009 | A1 |
| 20090236700 | Moriya | Sep 2009 | A1 |
| 20090236753 | Moon et al. | Sep 2009 | A1 |
| 20090256229 | Ishikawa et al. | Oct 2009 | A1 |
| 20090261466 | Pagaila et al. | Oct 2009 | A1 |
| 20090302445 | Pagaila et al. | Dec 2009 | A1 |
| 20090315579 | Beaman et al. | Dec 2009 | A1 |
| 20100003822 | Miyata et al. | Jan 2010 | A1 |
| 20100006963 | Brady | Jan 2010 | A1 |
| 20100007009 | Chang et al. | Jan 2010 | A1 |
| 20100025835 | Oh et al. | Feb 2010 | A1 |
| 20100052135 | Shim et al. | Mar 2010 | A1 |
| 20100078789 | Choi et al. | Apr 2010 | A1 |
| 20100078795 | Dekker et al. | Apr 2010 | A1 |
| 20100087035 | Yoo et al. | Apr 2010 | A1 |
| 20100090330 | Nakazato | Apr 2010 | A1 |
| 20100109138 | Cho | May 2010 | A1 |
| 20100117212 | Corisis et al. | May 2010 | A1 |
| 20100133675 | Yu et al. | Jun 2010 | A1 |
| 20100148360 | Lin et al. | Jun 2010 | A1 |
| 20100193937 | Nagamatsu et al. | Aug 2010 | A1 |
| 20100213560 | Wang et al. | Aug 2010 | A1 |
| 20100224975 | Shin et al. | Sep 2010 | A1 |
| 20100232129 | Haba et al. | Sep 2010 | A1 |
| 20100237471 | Pagaila et al. | Sep 2010 | A1 |
| 20100289142 | Shim et al. | Nov 2010 | A1 |
| 20100314748 | Hsu et al. | Dec 2010 | A1 |
| 20100327419 | Muthukumar et al. | Dec 2010 | A1 |
| 20110057308 | Choi et al. | Mar 2011 | A1 |
| 20110068453 | Cho et al. | Mar 2011 | A1 |
| 20110115081 | Osumi | May 2011 | A1 |
| 20110140259 | Cho et al. | Jun 2011 | A1 |
| 20110147911 | Kohl et al. | Jun 2011 | A1 |
| 20110220395 | Cho et al. | Sep 2011 | A1 |
| 20110223721 | Cho et al. | Sep 2011 | A1 |
| 20110237027 | Kim et al. | Sep 2011 | A1 |
| 20110241192 | Ding et al. | Oct 2011 | A1 |
| 20110241193 | Ding et al. | Oct 2011 | A1 |
| 20110272449 | Pirkle et al. | Nov 2011 | A1 |
| 20120007232 | Haba | Jan 2012 | A1 |
| 20120015481 | Kim | Jan 2012 | A1 |
| 20120018885 | Lee et al. | Jan 2012 | A1 |
| 20120025365 | Haba | Feb 2012 | A1 |
| 20120043655 | Khor et al. | Feb 2012 | A1 |
| 20120061814 | Camacho et al. | Mar 2012 | A1 |
| 20120063090 | Hsiao et al. | Mar 2012 | A1 |
| 20120080787 | Shah et al. | Apr 2012 | A1 |
| 20120086130 | Sasaki et al. | Apr 2012 | A1 |
| 20120104595 | Haba et al. | May 2012 | A1 |
| 20120119380 | Haba | May 2012 | A1 |
| 20120145442 | Gupta et al. | Jun 2012 | A1 |
| 20120146235 | Choi et al. | Jun 2012 | A1 |
| 20120184116 | Pawlikowski et al. | Jul 2012 | A1 |
| 20120280374 | Choi et al. | Nov 2012 | A1 |
| 20120280386 | Sato et al. | Nov 2012 | A1 |
| 20130049221 | Han et al. | Feb 2013 | A1 |
| 20130069222 | Camacho | Mar 2013 | A1 |
| 20130105979 | Yu et al. | May 2013 | A1 |
| 20130134588 | Yu et al. | May 2013 | A1 |
| 20140036454 | Caskey et al. | Feb 2014 | A1 |
| 20140124949 | Paek et al. | May 2014 | A1 |
| Number | Date | Country |
|---|---|---|
| 1641832 | Jul 2005 | CN |
| 1877824 | Dec 2006 | CN |
| 101449375 | Jun 2009 | CN |
| 101675516 | Mar 2010 | CN |
| 101819959 | Sep 2010 | CN |
| 102324418 | Jan 2012 | CN |
| 920058 | Jun 1999 | EP |
| 1449414 | Aug 2004 | EP |
| 2234158 | Sep 2010 | EP |
| 59189069 | Oct 1984 | JP |
| 61125062 | Jun 1986 | JP |
| 62-226307 | Oct 1987 | JP |
| 1012769 | Jan 1989 | JP |
| 64-71162 | Mar 1989 | JP |
| 06268015 | Sep 1994 | JP |
| 07-122787 | May 1995 | JP |
| 09505439 | May 1997 | JP |
| 1118364 | Jan 1999 | JP |
| 11-074295 | Mar 1999 | JP |
| 11135663 | May 1999 | JP |
| 11251350 | Sep 1999 | JP |
| 2001196407 | Jul 2001 | JP |
| 2001326236 | Nov 2001 | JP |
| 2002289769 | Oct 2002 | JP |
| 2003122611 | Apr 2003 | JP |
| 2003-174124 | Jun 2003 | JP |
| 2003307897 | Oct 2003 | JP |
| 2004281514 | Oct 2004 | JP |
| 2004327856 | Nov 2004 | JP |
| 2004343030 | Dec 2004 | JP |
| 2005011874 | Jan 2005 | JP |
| 2003377641 | Jun 2005 | JP |
| 2005142378 | Jun 2005 | JP |
| 2005175019 | Jun 2005 | JP |
| 2003426392 | Jul 2005 | JP |
| 2005183880 | Jul 2005 | JP |
| 2005183923 | Jul 2005 | JP |
| 2005203497 | Jul 2005 | JP |
| 2005302765 | Oct 2005 | JP |
| 2006186086 | Jul 2006 | JP |
| 2006344917 | Dec 2006 | JP |
| 2007123595 | May 2007 | JP |
| 2007287922 | Nov 2007 | JP |
| 2007-335464 | Dec 2007 | JP |
| 2008251794 | Oct 2008 | JP |
| 2009004650 | Jan 2009 | JP |
| 2009506553 | Feb 2009 | JP |
| 2009260132 | Nov 2009 | JP |
| 2010103129 | May 2010 | JP |
| 2010206007 | Sep 2010 | JP |
| 100265563 | Sep 2000 | KR |
| 2001-0094894 | Nov 2001 | KR |
| 10-0393102 | Jul 2002 | KR |
| 20020058216 | Jul 2002 | KR |
| 20060064291 | Jun 2006 | KR |
| 20080020069 | Mar 2008 | KR |
| 100865125 | Oct 2008 | KR |
| 20080094251 | Oct 2008 | KR |
| 100886100 | Feb 2009 | KR |
| 20090033605 | Apr 2009 | KR |
| 20090123680 | Dec 2009 | KR |
| 20100033012 | Mar 2010 | KR |
| 20100062315 | Jun 2010 | KR |
| 101011863 | Jan 2011 | KR |
| 20150012285 | Feb 2015 | KR |
| 200810079 | Feb 2008 | TW |
| 200933760 | Aug 2009 | TW |
| 201023277 | Jun 2010 | TW |
| 0213256 | Feb 2002 | WO |
| 03045123 | May 2003 | WO |
| 2006050691 | May 2006 | WO |
| 2008065896 | Jun 2008 | WO |
| 2008120755 | Oct 2008 | WO |
| 2010041630 | Apr 2010 | WO |
| 2010101163 | Sep 2010 | WO |
| 2014107301 | Jul 2014 | WO |
| Entry |
|---|
| Korean Office Action for Application No. 2014-7025992 dated Feb. 5, 2015. |
| Taiwanese Office Action for Application No. 100140428 dated Jan. 26, 2015. |
| Neo-Manhattan Technology, A Novel HDI Manufacturing Process, “High-Density Interconnects for Advanced Flex Substrates & 3-D Package Stacking,” IPC Flex & Chips Symposium, Tempe, AZ, Feb. 11-12, 2003. |
| North Corporation, “Processed Intra-layer Interconnection Material for PWBs [Etched Copper Bump with Copper Foil],” NMBITM, Version Jun. 2001. |
| Kim et al., “Application of Through Mold Via (TMV) as PoP base package”, 6 pages (2008). |
| International Search Report, PCT/US2005/039716, Apr. 5, 2006. |
| International Search Report Application No. PCT/US2011/024143, dated Sep. 14, 2011. |
| Korean Search Report KR10-2011-0041843 dated Feb. 24, 2011. |
| International Search Report and Written Opinion PCT/US2011/044342 dated May 7, 2012. |
| Bang, U.S. Appl. No. 10/656,534, filed Sep. 5, 2003. |
| International Search Report and Written Opinion for Application No. PCT/US2011/044346 dated May 11, 2012. |
| Partial International Search Report from Invitation to Pay Additional Fees for Application No. PCT/US2012/028738 dated Jun. 6, 2012. |
| Korean Office Action for Application No. 10-2011-0041843 dated Jun. 20, 2011. |
| “EE Times Asia” [online]. [Retrieved Aug. 5, 2010]. Retrieved from internet. <http://www.eetasia.com/ART—8800428222—480300—nt—dec52276.HTM>, 4 pages. |
| Redistributed Chip Package (RCP) Technology, Freescale Semiconductor, 2005, 6 pages. |
| “Wafer Level Stack—WDoD”, [online]. [Retrieved Aug. 5, 2010]. Retrieved from the internet. <http://www.3d-plus.com/techno-wafer-level-stack-wdod.php>, 2 pages. |
| Jin, Yonggang et al., “STM 3D-IC Package and 3D eWLB Development,” STMicroelectronics Singapore/STMicroelectronics France May 21, 2010. |
| Yoon, PhD, Seung Wook, “Next Generation Wafer Level Packaging Solution for 3D integration,” May 2010, Stats ChipPAC Ltd. |
| Search Report from Korean Patent Applicatin No. 10-2010-0113271 dated Jan. 12, 2011. |
| International Search Report and Written Opinion for PCT/US2011/060551 dated Apr. 18, 2012. |
| Meiser S, “Klein Und Komplex”, Elektronik, IRL Press Limited, DE, vol. 41, No. 1, Jan. 7, 1992, pp. 72-77, XP000277326. (International Search Report for Application No. PCT/US2012/060402 dated Feb. 21, 2013 provides concise statement of relevance.). |
| Partial International Search Report for Application No. PCT/US20121060402 dated Feb. 21, 2013. |
| International Search Report and Written Opinion for Application No. PCT/US2012/060402 dated Apr. 2, 2013. |
| Partial International Search Report for Application No. PCT/US2013/026126 dated Jun. 17, 2013. |
| International Search Report and Written Opinion for Application No. PCT/US2013/026126 dated Jul. 25, 2013. |
| Extended European Search Report for Application No. EP13162975 dated Sep. 5, 2013. |
| International Search Report and Written Opinion for Application No. PCT/US2013/052883 dated Oct. 21, 2013. |
| Japanese Office Action for Application No. 2013-509325 dated Oct. 18, 2013. |
| Office Action from U.S. Appl. No. 12/769,930 mailed May 5, 2011. |
| International Search Report and Written Opinion for Application No. PCT/US2013/053437 dated Nov. 25, 2013. |
| International Search Report and Written Opinion for Application No. PCT/US2013/041981 dated Nov. 13, 2013. |
| Office Action for Taiwan Application No. 100125521 dated Dec. 20. 2013. |
| Office Action from Taiwan for Application No. 100125522 dated Jan. 27, 2014. |
| Partial International Search Report for Application No. PCT/US2013/075672 dated Mar. 12, 2014. |
| Taiwanese Office Action for Application No. 100141695 dated Mar. 19, 2014. |
| International Search Report and Written Opinion for Application No. PCT/US2013/075672 dated Apr. 22, 2014. |
| Taiwanese Office Action for Application No. 101138311 dated Jun. 27, 2014. |
| Chinese Office Action for Application No. 201180022247.8 dated Sep. 16, 2014. |
| International Search Report and Written Opinion for Application No. PCT/US2011/024143 dated Jan. 17, 2012. |
| Chinese Office Action for Application No. 201180022247.8 dated Apr. 14, 2015. |
| Chinese Office Action for Application No. 201310264264.3 dated May 12, 2015. |
| International Search Report and Written Opinion for Application No. PCT/US2015/011715 dated Apr. 20, 2015. |
| Japanese Office Action for Application No. 2013-520776 dated Apr. 21, 2015. |
| Japanese Office Action for Application No. 2013-520777 dated May 22, 2015. |
| Number | Date | Country | |
|---|---|---|---|
| 20150091118 A1 | Apr 2015 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 13462158 | May 2012 | US |
| Child | 13792521 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 13792521 | Mar 2013 | US |
| Child | 14564640 | US |
