Konika Ganguly

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Power control of a memory device in connected standby state
- Patent number 12,106,818
- Issue date Oct 1, 2024
- Intel Corporation
- Aiswarya M. Pious
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connector with staggered pin orientation
- Patent number 12,040,568
- Issue date Jul 16, 2024
- Intel Corporation
- Xiang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stiffener and package substrate for a semiconductor package
- Patent number 11,295,998
- Issue date Apr 5, 2022
- Intel Corporation
- Stephen Christianson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory channel having more than one DIMM per motherboard DIMM conne...
- Patent number 10,467,160
- Issue date Nov 5, 2019
- Intel Corporation
- Xiang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O layout footprint for multiple 1LM/2LM configurations
- Patent number 10,304,814
- Issue date May 28, 2019
- Intel Corporation
- Konika Ganguly
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
GDDR MEMORY EXPANDER USING CMT CONNECTOR
- Publication number 20230007775
- Publication date Jan 5, 2023
- Intel Corporation
- Xiang LI
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ADAPTER CARD WITH COMPRESSION ATTACHED MEMORY MODULES
- Publication number 20220368047
- Publication date Nov 17, 2022
- Intel Corporation
- George VERGIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE ADAPTER CARD WITH MULTIPLEXER CIRCUITRY
- Publication number 20220358072
- Publication date Nov 10, 2022
- Intel Corporation
- George VERGIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIFFERENTIAL I/O CARD USING CMT CONNECTOR
- Publication number 20220360002
- Publication date Nov 10, 2022
- Intel Corporation
- Xiang LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER CONVERSION MODULE USING CMT CONNECTOR
- Publication number 20220361328
- Publication date Nov 10, 2022
- Intel Corporation
- Xiang LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKABLE MEMORY MODULE WITH DOUBLE-SIDED COMPRESSION CONTACT PADS
- Publication number 20220353991
- Publication date Nov 3, 2022
- Intel Corporation
- Xiang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
LOW POWER MEMORY MODULE
- Publication number 20220217846
- Publication date Jul 7, 2022
- Intel Corporation
- Xiang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MEMORY MODULE CONNECTOR FOR THIN COMPUTING SYSTEMS
- Publication number 20220077609
- Publication date Mar 10, 2022
- Intel Corporation
- Navneet Kumar SINGH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CLOSED LOOP COMPRESSED CONNECTOR PIN
- Publication number 20210344130
- Publication date Nov 4, 2021
- Intel Corporation
- Xiang LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEAF SPRING FOR IMPROVED MEMORY MODULE THAT CONSERVES MOTHERBOARD W...
- Publication number 20210328370
- Publication date Oct 21, 2021
- Intel Corporation
- Phil GENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPROVED MEMORY MODULE THAT CONSERVES MOTHERBOARD WIRING SPACE
- Publication number 20210183410
- Publication date Jun 17, 2021
- Intel Corporation
- Xiang LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONNECTOR WITH STAGGERED PIN ORIENTATION
- Publication number 20210151916
- Publication date May 20, 2021
- Intel Corporation
- Xiang LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER CONTROL OF A MEMORY DEVICE IN CONNECTED STANDBY STATE
- Publication number 20210151083
- Publication date May 20, 2021
- Intel Corporation
- Aiswarya M. PIOUS
- G11 - INFORMATION STORAGE
Information Patent Application
STIFFENER AND PACKAGE SUBSTRATE FOR A SEMICONDUCTOR PACKAGE
- Publication number 20190311963
- Publication date Oct 10, 2019
- Intel Corporation
- Stephen CHRISTIANSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CHANNEL HAVING MORE THAN ONE DIMM PER MOTHERBOARD DIMM CONNE...
- Publication number 20190102331
- Publication date Apr 4, 2019
- Intel Corporation
- Xiang LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
I/O Layout Footprint For Multiple 1LM/2LM Configurations
- Publication number 20190006340
- Publication date Jan 3, 2019
- Intel Corporation
- Konika GANGULY
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIP...
- Publication number 20150234726
- Publication date Aug 20, 2015
- Brian P. Moran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for automatically calibrating two-tap and multi-t...
- Publication number 20050201454
- Publication date Sep 15, 2005
- Intel Corporation
- Santanu Chaudhuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Konika Ganguly

Person

Patents Grantslast 30 patents

Power control of a memory device in connected standby state

Connector with staggered pin orientation

Stiffener and package substrate for a semiconductor package

Memory channel having more than one DIMM per motherboard DIMM conne...

I/O layout footprint for multiple 1LM/2LM configurations

Patents Applicationslast 30 patents

GDDR MEMORY EXPANDER USING CMT CONNECTOR

ADAPTER CARD WITH COMPRESSION ATTACHED MEMORY MODULES

MEMORY MODULE ADAPTER CARD WITH MULTIPLEXER CIRCUITRY

DIFFERENTIAL I/O CARD USING CMT CONNECTOR

POWER CONVERSION MODULE USING CMT CONNECTOR

STACKABLE MEMORY MODULE WITH DOUBLE-SIDED COMPRESSION CONTACT PADS

LOW POWER MEMORY MODULE

MEMORY MODULE CONNECTOR FOR THIN COMPUTING SYSTEMS

CLOSED LOOP COMPRESSED CONNECTOR PIN

LEAF SPRING FOR IMPROVED MEMORY MODULE THAT CONSERVES MOTHERBOARD W...

IMPROVED MEMORY MODULE THAT CONSERVES MOTHERBOARD WIRING SPACE

CONNECTOR WITH STAGGERED PIN ORIENTATION

POWER CONTROL OF A MEMORY DEVICE IN CONNECTED STANDBY STATE

STIFFENER AND PACKAGE SUBSTRATE FOR A SEMICONDUCTOR PACKAGE

MEMORY CHANNEL HAVING MORE THAN ONE DIMM PER MOTHERBOARD DIMM CONNE...

I/O Layout Footprint For Multiple 1LM/2LM Configurations

APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIP...

System and method for automatically calibrating two-tap and multi-t...