Konstantin Bourdelle

Person

Crolles, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Method of testing a semiconductor-on-insulator structure and applic...
- Patent number 9,698,063
- Issue date Jul 4, 2017
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of high temperature layer transfer
- Patent number 9,275,892
- Issue date Mar 1, 2016
- Soitec
- Nicolas Daix
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor substrate
- Patent number 9,035,474
- Issue date May 19, 2015
- Soitec
- Carlos Mazure
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a Ge on III/V-on-insulator structure
- Patent number 9,018,678
- Issue date Apr 28, 2015
- Soitec
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for self-supported transfer of a fine layer by pulsation aft...
- Patent number 8,309,431
- Issue date Nov 13, 2012
- Commissariat a l'Energie Atomique
- Nguyet-Phuong Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for manufacturing multilayer wafers with trench structures
- Patent number 8,309,426
- Issue date Nov 13, 2012
- Soitec
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing heterostructures
- Patent number 8,263,475
- Issue date Sep 11, 2012
- Soitec
- Ionut Radu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a back-illuminated image sensor
- Patent number 8,241,942
- Issue date Aug 14, 2012
- Soitec
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid semiconductor substrate including semiconductor-on-insulator...
- Patent number 8,058,158
- Issue date Nov 15, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Quality of a thin layer through high-temperature thermal annealing
- Patent number 7,871,900
- Issue date Jan 18, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a semiconductor substrate
- Patent number 7,833,877
- Issue date Nov 16, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of treating interface defects in a substrate
- Patent number 7,799,651
- Issue date Sep 21, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Carlos Mazure
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate production method and substrate including amorphization a...
- Patent number 7,767,545
- Issue date Aug 3, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for direct bonding two semiconductor substrates
- Patent number 7,670,929
- Issue date Mar 2, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a silicon dioxide layer
- Patent number 7,645,486
- Issue date Jan 12, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of fabricating a hybrid substrate
- Patent number 7,575,988
- Issue date Aug 18, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a wafer
- Patent number 7,572,331
- Issue date Aug 11, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic implantation and thermal treatment of a semiconductor layer
- Patent number 7,449,394
- Issue date Nov 11, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a wafer
- Patent number 7,407,548
- Issue date Aug 5, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transferring a thin layer including a controlled disturb...
- Patent number 7,387,947
- Issue date Jun 17, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Ian Cayrefourcq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating a germanium on insulator wafer
- Patent number 7,229,898
- Issue date Jun 12, 2007
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF TESTING A SEMICONDUCTOR ON INSULATOR STRUCTURE AND APPLIC...
- Publication number 20150014822
- Publication date Jan 15, 2015
- SOITEC
- Patrick Reynaud
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR ON INSULATOR STRUCTURE WITH IMPROVED ELECTRICAL CHARA...
- Publication number 20140284768
- Publication date Sep 25, 2014
- SOITEC
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
A METHOD OF HIGH TEMPERATURE LAYER TRANSFER
- Publication number 20130302970
- Publication date Nov 14, 2013
- SOITEC
- Nicolas Daix
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A GE ON III/V-ON-INSULATOR STRUCTURE
- Publication number 20120228672
- Publication date Sep 13, 2012
- SOITEC
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR MANUFACTURING MULTILAYER WAFERS WITH TRENCH STRUCTURES
- Publication number 20110294277
- Publication date Dec 1, 2011
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A BACK-ILLUMINATED IMAGE SENSOR
- Publication number 20110287571
- Publication date Nov 24, 2011
- S. O. I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE
- Publication number 20110241157
- Publication date Oct 6, 2011
- Carlos Mazure
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A STRUCTURE COMPRISING A STEP FOR IMPLANTING IONS...
- Publication number 20110165758
- Publication date Jul 7, 2011
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION PROCESS OF A HYBRID SEMICONDUCTOR SUBSTRATE
- Publication number 20100289113
- Publication date Nov 18, 2010
- S. O. I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING HETEROSTRUCTURES
- Publication number 20100264458
- Publication date Oct 21, 2010
- Ionut Radu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF TREATING INTERFACE DEFECTS IN A SUBSTRATE
- Publication number 20090014720
- Publication date Jan 15, 2009
- Carlos Mazure
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate Production Method and Substrate
- Publication number 20080303061
- Publication date Dec 11, 2008
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUALITY OF A THIN LAYER THROUGH HIGH-TEMPERATURE THERMAL ANNEALING
- Publication number 20080237804
- Publication date Oct 2, 2008
- Konstantin BOURDELLE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SEMICONDUCTOR SUBSTRATE
- Publication number 20080102601
- Publication date May 1, 2008
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A HYBRID SUBSTRATE
- Publication number 20080014714
- Publication date Jan 17, 2008
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR DIRECT BONDING TWO SEMICONDUCTOR SUBSTRATES
- Publication number 20080014712
- Publication date Jan 17, 2008
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Self-Supported Transfer of a Fine Layer by Pulsation aft...
- Publication number 20070281445
- Publication date Dec 6, 2007
- Nguyet-Phuong Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A SILICON DIOXIDE LAYER
- Publication number 20070134887
- Publication date Jun 14, 2007
- Konstantin Bourdelle
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method of manufacturing a wafer
- Publication number 20070000435
- Publication date Jan 4, 2007
- S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for fabricating a germanium on insulator wafer
- Publication number 20060110899
- Publication date May 25, 2006
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for transferring a thin layer including a controlled disturb...
- Publication number 20060099779
- Publication date May 11, 2006
- Ian Cayrefourcq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermal treatment of a semiconductor layer
- Publication number 20060014363
- Publication date Jan 19, 2006
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Atomic implantation and thermal treatment of a semiconductor layer
- Publication number 20050245049
- Publication date Nov 3, 2005
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of manufacturing a wafer
- Publication number 20050188915
- Publication date Sep 1, 2005
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS

Konstantin Bourdelle

Person

Patents Grantslast 30 patents

Method of testing a semiconductor-on-insulator structure and applic...

Method of high temperature layer transfer

Method for manufacturing a semiconductor substrate

Method for forming a Ge on III/V-on-insulator structure

Method for self-supported transfer of a fine layer by pulsation aft...

Methods for manufacturing multilayer wafers with trench structures

Method for manufacturing heterostructures

Method of fabricating a back-illuminated image sensor

Hybrid semiconductor substrate including semiconductor-on-insulator...

Quality of a thin layer through high-temperature thermal annealing

Method for producing a semiconductor substrate

Method of treating interface defects in a substrate

Substrate production method and substrate including amorphization a...

Method for direct bonding two semiconductor substrates

Method of manufacturing a silicon dioxide layer

Method of fabricating a hybrid substrate

Method of manufacturing a wafer

Atomic implantation and thermal treatment of a semiconductor layer

Method of manufacturing a wafer

Method for transferring a thin layer including a controlled disturb...

Methods for fabricating a germanium on insulator wafer

Patents Applicationslast 30 patents

METHOD OF TESTING A SEMICONDUCTOR ON INSULATOR STRUCTURE AND APPLIC...

SEMICONDUCTOR ON INSULATOR STRUCTURE WITH IMPROVED ELECTRICAL CHARA...

A METHOD OF HIGH TEMPERATURE LAYER TRANSFER

METHOD FOR FORMING A GE ON III/V-ON-INSULATOR STRUCTURE

METHODS FOR MANUFACTURING MULTILAYER WAFERS WITH TRENCH STRUCTURES

METHOD OF FABRICATING A BACK-ILLUMINATED IMAGE SENSOR

METHOD FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE

METHOD FOR MAKING A STRUCTURE COMPRISING A STEP FOR IMPLANTING IONS...

FABRICATION PROCESS OF A HYBRID SEMICONDUCTOR SUBSTRATE

METHOD FOR MANUFACTURING HETEROSTRUCTURES

METHOD OF TREATING INTERFACE DEFECTS IN A SUBSTRATE

Substrate Production Method and Substrate

QUALITY OF A THIN LAYER THROUGH HIGH-TEMPERATURE THERMAL ANNEALING

METHOD FOR PRODUCING A SEMICONDUCTOR SUBSTRATE

METHOD OF FABRICATING A HYBRID SUBSTRATE

METHOD FOR DIRECT BONDING TWO SEMICONDUCTOR SUBSTRATES

Method for Self-Supported Transfer of a Fine Layer by Pulsation aft...

METHOD OF MANUFACTURING A SILICON DIOXIDE LAYER

Method of manufacturing a wafer

Methods for fabricating a germanium on insulator wafer

Method for transferring a thin layer including a controlled disturb...

Thermal treatment of a semiconductor layer

Atomic implantation and thermal treatment of a semiconductor layer

Method of manufacturing a wafer