KyungOe Kim

Person

Daejeon, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of making a photonic semiconductor...
- Patent number 12,218,114
- Issue date Feb 4, 2025
- STATS ChipPAC Pte. Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermally enhanced FCBGA package
- Patent number 12,107,028
- Issue date Oct 1, 2024
- STATS ChipPAC Pte. Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of controlling warpage during LAB
- Patent number 12,074,135
- Issue date Aug 27, 2024
- STATS ChipPAC Pte. Ltd.
- Wagno Alves Braganca
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die-beam alignment for laser-assisted bonding
- Patent number 11,929,334
- Issue date Mar 12, 2024
- STATS ChipPAC Pte. Ltd.
- Wagno Alves Braganca
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package with compartmentalized lid for heat spreader and EMI shield
- Patent number 11,823,973
- Issue date Nov 21, 2023
- STATS ChipPAC Pte. Ltd.
- DongSam Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Region-of-interest positioning for laser-assisted bonding
- Patent number 11,817,357
- Issue date Nov 14, 2023
- STATS ChipPAC Pte. Ltd.
- Wagno Alves Braganca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and method of controlling warpage during LAB
- Patent number 11,688,718
- Issue date Jun 27, 2023
- STATS ChipPAC Pte. Ltd.
- Wagno Alves Braganca
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermally enhanced FCBGA package
- Patent number 11,670,563
- Issue date Jun 6, 2023
- STATS ChipPAC Pte. Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with substrate and method of ma...
- Patent number 10,109,587
- Issue date Oct 23, 2018
- STATS ChipPAC Pte. Ltd.
- Dao Nguyen Phu Cuong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number 9,773,685
- Issue date Sep 26, 2017
- STATS ChipPAC Pte. Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with substrate and method of ma...
- Patent number 9,412,624
- Issue date Aug 9, 2016
- STATS ChipPAC Pte. Ltd.
- Dao Nguyen Phu Cuong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection
- Patent number 9,373,573
- Issue date Jun 21, 2016
- STATS ChipPAC Pte. Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacture of integrated circuit packaging system with p...
- Patent number 9,093,278
- Issue date Jul 28, 2015
- Stats Chippac Ltd.
- JoonYoung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with substrate mold gate and me...
- Patent number 8,859,342
- Issue date Oct 14, 2014
- Stats Chippac Ltd.
- Oh Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection
- Patent number 8,810,029
- Issue date Aug 19, 2014
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number RE44761
- Issue date Feb 11, 2014
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- 438 - Semiconductor device manufacturing: process
Information Patent Grant
Solder joint flip chip interconnection
- Patent number RE44608
- Issue date Nov 26, 2013
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- 257 - Active solid-state devices
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number RE44562
- Issue date Oct 29, 2013
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- 257 - Active solid-state devices
Information Patent Grant
Package in package system incorporating an internal stiffener compo...
- Patent number 8,288,205
- Issue date Oct 16, 2012
- Stats Chippac Ltd.
- Seong Bo Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number 8,216,930
- Issue date Jul 10, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection
- Patent number 8,129,841
- Issue date Mar 6, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit mount system with solder mask pad
- Patent number 8,124,520
- Issue date Feb 28, 2012
- Stats Chippac Ltd.
- KyungOe Kim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods for manufacturing thermally enhanced flip-chip ball grid ar...
- Patent number 8,115,301
- Issue date Feb 14, 2012
- Stats Chippac, Inc.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with side substrate having a top...
- Patent number 8,018,052
- Issue date Sep 13, 2011
- Stats Chippac Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming oxide layer on signal tr...
- Patent number 7,851,345
- Issue date Dec 14, 2010
- STATS ChipPAC, Ltd.
- SeongBo Shim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number 7,659,633
- Issue date Feb 9, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Thermally Enhanced FCBGA Package
- Publication number 20240421024
- Publication date Dec 19, 2024
- STATS ChipPAC Pte Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die-Beam Alignment for Laser-Assisted Bonding
- Publication number 20240170422
- Publication date May 23, 2024
- STATS ChipPAC Pte Ltd.
- Wagno Alves Braganca
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor Device and Method of Controlling Warpage During LAB
- Publication number 20230307414
- Publication date Sep 28, 2023
- STATS ChipPAC Pte Ltd.
- Wagno Alves Braganca
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermally Enhanced FCBGA Package
- Publication number 20230260865
- Publication date Aug 17, 2023
- STATS ChipPAC Pte Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making a Photonic Semiconductor...
- Publication number 20230125546
- Publication date Apr 27, 2023
- STATS ChipPAC Pte Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package with Compartmentalized Lid for Heat Spreader and EMI Shield
- Publication number 20230119942
- Publication date Apr 20, 2023
- STATS ChipPAC Pte Ltd.
- DongSam Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Controlling Warpage During LAB
- Publication number 20230077132
- Publication date Mar 9, 2023
- STATS ChipPAC Pte Ltd.
- Wagno Alves Braganca
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermally Enhanced FCBGA Package
- Publication number 20220415744
- Publication date Dec 29, 2022
- STATS ChipPAC Pte Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Region-of-Interest Positioning for Laser-Assisted Bonding
- Publication number 20220399236
- Publication date Dec 15, 2022
- STATS ChipPAC Pte Ltd.
- Wagno Alves Braganca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Die-Beam Alignment for Laser-Assisted Bonding
- Publication number 20210296268
- Publication date Sep 23, 2021
- STATS ChipPAC Pte Ltd.
- Wagno Alves Braganca
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH NO-REFLOW CONNECTION AND M...
- Publication number 20150318259
- Publication date Nov 5, 2015
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection
- Publication number 20140291839
- Publication date Oct 2, 2014
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE MOLD GATE AND ME...
- Publication number 20130154079
- Publication date Jun 20, 2013
- Oh Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection Having Relief Structure
- Publication number 20120273943
- Publication date Nov 1, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection
- Publication number 20120133043
- Publication date May 31, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection Having Relief Structure
- Publication number 20100099222
- Publication date Apr 22, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection
- Publication number 20100065966
- Publication date Mar 18, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE IN PACKAGE SYSTEM INCORPORATING AN INTERNAL STIFFENER COMPO...
- Publication number 20090236719
- Publication date Sep 24, 2009
- Seong Bo Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Oxide Layer on Signal Tr...
- Publication number 20090236738
- Publication date Sep 24, 2009
- STATS ChipPAC, Ltd.
- SeongBo Shim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SIDE SUBSTRATE
- Publication number 20090001545
- Publication date Jan 1, 2009
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for manufacturing thermally enhanced flip-chip ball grid ar...
- Publication number 20080116586
- Publication date May 22, 2008
- STATS ChipPAC, Inc.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT MOUNT SYSTEM WITH SOLDER MASK PAD
- Publication number 20080014738
- Publication date Jan 17, 2008
- STATS ChipPAC Ltd.
- KyungOe Kim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Solder joint flip chip interconnection having relief structure
- Publication number 20070241464
- Publication date Oct 18, 2007
- STATS ChipPAC Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder joint flip chip interconnection
- Publication number 20070105277
- Publication date May 10, 2007
- STATS ChipPAC Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS

KyungOe Kim

Person

Patents Grantslast 30 patents

Semiconductor device and method of making a photonic semiconductor...

Thermally enhanced FCBGA package

Semiconductor device and method of controlling warpage during LAB

Die-beam alignment for laser-assisted bonding

Package with compartmentalized lid for heat spreader and EMI shield

Region-of-interest positioning for laser-assisted bonding

Semiconductor device and method of controlling warpage during LAB

Thermally enhanced FCBGA package

Integrated circuit packaging system with substrate and method of ma...

Solder joint flip chip interconnection having relief structure

Integrated circuit packaging system with substrate and method of ma...

Solder joint flip chip interconnection

Method of manufacture of integrated circuit packaging system with p...

Integrated circuit packaging system with substrate mold gate and me...

Solder joint flip chip interconnection

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection

Solder joint flip chip interconnection having relief structure

Package in package system incorporating an internal stiffener compo...

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection

Integrated circuit mount system with solder mask pad

Methods for manufacturing thermally enhanced flip-chip ball grid ar...

Integrated circuit package system with side substrate having a top...

Semiconductor device and method of forming oxide layer on signal tr...

Solder joint flip chip interconnection having relief structure

Patents Applicationslast 30 patents

Thermally Enhanced FCBGA Package

Die-Beam Alignment for Laser-Assisted Bonding

Semiconductor Device and Method of Controlling Warpage During LAB

Thermally Enhanced FCBGA Package

Semiconductor Device and Method of Making a Photonic Semiconductor...

Package with Compartmentalized Lid for Heat Spreader and EMI Shield

Semiconductor Device and Method of Controlling Warpage During LAB

Thermally Enhanced FCBGA Package

Region-of-Interest Positioning for Laser-Assisted Bonding

Die-Beam Alignment for Laser-Assisted Bonding

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH NO-REFLOW CONNECTION AND M...

Solder Joint Flip Chip Interconnection

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE MOLD GATE AND ME...

Solder Joint Flip Chip Interconnection Having Relief Structure

Solder Joint Flip Chip Interconnection

Solder Joint Flip Chip Interconnection Having Relief Structure

Solder Joint Flip Chip Interconnection

PACKAGE IN PACKAGE SYSTEM INCORPORATING AN INTERNAL STIFFENER COMPO...

Semiconductor Device and Method of Forming Oxide Layer on Signal Tr...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SIDE SUBSTRATE

Methods for manufacturing thermally enhanced flip-chip ball grid ar...

INTEGRATED CIRCUIT MOUNT SYSTEM WITH SOLDER MASK PAD

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection